acp.c (03ab8e6297acd1bc0eedaa050e2a1635c576fd11) | acp.c (b585692fc937dc8f9d494078b5ffe2aafe31ec18) |
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1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2// 3// This file is provided under a dual BSD/GPLv2 license. When using or 4// redistributing this file, you may do so under either license. 5// 6// Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved. 7// 8// Authors: Vijendar Mukunda <Vijendar.Mukunda@amd.com> --- 124 unchanged lines hidden (view full) --- 133 134 /* Clear descriptor array */ 135 for (index = 0; index < desc_count; index++) 136 memset(&adata->dscr_info[index], 0x00, sizeof(struct dma_descriptor)); 137 138 return ret; 139} 140 | 1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 2// 3// This file is provided under a dual BSD/GPLv2 license. When using or 4// redistributing this file, you may do so under either license. 5// 6// Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved. 7// 8// Authors: Vijendar Mukunda <Vijendar.Mukunda@amd.com> --- 124 unchanged lines hidden (view full) --- 133 134 /* Clear descriptor array */ 135 for (index = 0; index < desc_count; index++) 136 memset(&adata->dscr_info[index], 0x00, sizeof(struct dma_descriptor)); 137 138 return ret; 139} 140 |
141static int psp_fw_validate(struct acp_dev_data *adata) | 141/* 142 * psp_mbox_ready- function to poll ready bit of psp mbox 143 * @adata: acp device data 144 * @ack: bool variable to check ready bit status or psp ack 145 */ 146 147static int psp_mbox_ready(struct acp_dev_data *adata, bool ack) |
142{ 143 struct snd_sof_dev *sdev = adata->dev; 144 int timeout; 145 u32 data; 146 | 148{ 149 struct snd_sof_dev *sdev = adata->dev; 150 int timeout; 151 u32 data; 152 |
147 smn_write(adata->smn_dev, MP0_C2PMSG_26_REG, MBOX_ACP_SHA_DMA_COMMAND); 148 | |
149 for (timeout = ACP_PSP_TIMEOUT_COUNTER; timeout > 0; timeout--) { 150 msleep(20); | 153 for (timeout = ACP_PSP_TIMEOUT_COUNTER; timeout > 0; timeout--) { 154 msleep(20); |
151 smn_read(adata->smn_dev, MP0_C2PMSG_26_REG, &data); | 155 smn_read(adata->smn_dev, MP0_C2PMSG_114_REG, &data); |
152 if (data & MBOX_READY_MASK) 153 return 0; 154 } 155 | 156 if (data & MBOX_READY_MASK) 157 return 0; 158 } 159 |
156 dev_err(sdev->dev, "FW validation timedout: status %x\n", data & MBOX_STATUS_MASK); 157 return -ETIMEDOUT; | 160 dev_err(sdev->dev, "PSP error status %x\n", data & MBOX_STATUS_MASK); 161 162 if (ack) 163 return -ETIMEDOUT; 164 165 return -EBUSY; |
158} 159 | 166} 167 |
168/* 169 * psp_send_cmd - function to send psp command over mbox 170 * @adata: acp device data 171 * @cmd: non zero integer value for command type 172 */ 173 174static int psp_send_cmd(struct acp_dev_data *adata, int cmd) 175{ 176 struct snd_sof_dev *sdev = adata->dev; 177 int ret, timeout; 178 u32 data; 179 180 if (!cmd) 181 return -EINVAL; 182 183 /* Get a non-zero Doorbell value from PSP */ 184 for (timeout = ACP_PSP_TIMEOUT_COUNTER; timeout > 0; timeout--) { 185 msleep(MBOX_DELAY); 186 smn_read(adata->smn_dev, MP0_C2PMSG_73_REG, &data); 187 if (data) 188 break; 189 } 190 191 if (!timeout) { 192 dev_err(sdev->dev, "Failed to get Doorbell from MBOX %x\n", MP0_C2PMSG_73_REG); 193 return -EINVAL; 194 } 195 196 /* Check if PSP is ready for new command */ 197 ret = psp_mbox_ready(adata, 0); 198 if (ret) 199 return ret; 200 201 smn_write(adata->smn_dev, MP0_C2PMSG_114_REG, cmd); 202 203 /* Ring the Doorbell for PSP */ 204 smn_write(adata->smn_dev, MP0_C2PMSG_73_REG, data); 205 206 /* Check MBOX ready as PSP ack */ 207 ret = psp_mbox_ready(adata, 1); 208 209 return ret; 210} 211 |
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160int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr, 161 unsigned int start_addr, unsigned int dest_addr, 162 unsigned int image_length) 163{ 164 struct snd_sof_dev *sdev = adata->dev; 165 unsigned int tx_count, fw_qualifier, val; 166 int ret; 167 --- 23 unchanged lines hidden (view full) --- 191 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_TRANSFER_BYTE_CNT, 192 tx_count, tx_count == image_length, 193 ACP_REG_POLL_INTERVAL, ACP_DMA_COMPLETE_TIMEOUT_US); 194 if (ret < 0) { 195 dev_err(sdev->dev, "SHA DMA Failed to Transfer Length %x\n", tx_count); 196 return ret; 197 } 198 | 212int configure_and_run_sha_dma(struct acp_dev_data *adata, void *image_addr, 213 unsigned int start_addr, unsigned int dest_addr, 214 unsigned int image_length) 215{ 216 struct snd_sof_dev *sdev = adata->dev; 217 unsigned int tx_count, fw_qualifier, val; 218 int ret; 219 --- 23 unchanged lines hidden (view full) --- 243 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_TRANSFER_BYTE_CNT, 244 tx_count, tx_count == image_length, 245 ACP_REG_POLL_INTERVAL, ACP_DMA_COMPLETE_TIMEOUT_US); 246 if (ret < 0) { 247 dev_err(sdev->dev, "SHA DMA Failed to Transfer Length %x\n", tx_count); 248 return ret; 249 } 250 |
199 ret = psp_fw_validate(adata); | 251 ret = psp_send_cmd(adata, MBOX_ACP_SHA_DMA_COMMAND); |
200 if (ret) 201 return ret; 202 203 fw_qualifier = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SHA_DSP_FW_QUALIFIER); 204 if (!(fw_qualifier & DSP_FW_RUN_ENABLE)) { 205 dev_err(sdev->dev, "PSP validation failed\n"); 206 return -EINVAL; 207 } --- 148 unchanged lines hidden (view full) --- 356 int ret; 357 358 /* power on */ 359 ret = acp_power_on(sdev); 360 if (ret) { 361 dev_err(sdev->dev, "ACP power on failed\n"); 362 return ret; 363 } | 252 if (ret) 253 return ret; 254 255 fw_qualifier = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SHA_DSP_FW_QUALIFIER); 256 if (!(fw_qualifier & DSP_FW_RUN_ENABLE)) { 257 dev_err(sdev->dev, "PSP validation failed\n"); 258 return -EINVAL; 259 } --- 148 unchanged lines hidden (view full) --- 408 int ret; 409 410 /* power on */ 411 ret = acp_power_on(sdev); 412 if (ret) { 413 dev_err(sdev->dev, "ACP power on failed\n"); 414 return ret; 415 } |
416 417 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, 0x01); |
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364 /* Reset */ 365 return acp_reset(sdev); 366} 367 | 418 /* Reset */ 419 return acp_reset(sdev); 420} 421 |
422int amd_sof_acp_suspend(struct snd_sof_dev *sdev, u32 target_state) 423{ 424 int ret; 425 426 ret = acp_reset(sdev); 427 if (ret) { 428 dev_err(sdev->dev, "ACP Reset failed\n"); 429 return ret; 430 } 431 432 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, 0x00); 433 434 return 0; 435} 436EXPORT_SYMBOL_NS(amd_sof_acp_suspend, SND_SOC_SOF_AMD_COMMON); 437 438int amd_sof_acp_resume(struct snd_sof_dev *sdev) 439{ 440 int ret; 441 442 ret = acp_init(sdev); 443 if (ret) { 444 dev_err(sdev->dev, "ACP Init failed\n"); 445 return ret; 446 } 447 448 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CLKMUX_SEL, 0x03); 449 450 ret = acp_memory_init(sdev); 451 452 return ret; 453} 454EXPORT_SYMBOL_NS(amd_sof_acp_resume, SND_SOC_SOF_AMD_COMMON); 455 |
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368int amd_sof_acp_probe(struct snd_sof_dev *sdev) 369{ 370 struct pci_dev *pci = to_pci_dev(sdev->dev); 371 struct acp_dev_data *adata; 372 const struct sof_amd_acp_desc *chip; 373 unsigned int addr; 374 int ret; 375 --- 70 unchanged lines hidden --- | 456int amd_sof_acp_probe(struct snd_sof_dev *sdev) 457{ 458 struct pci_dev *pci = to_pci_dev(sdev->dev); 459 struct acp_dev_data *adata; 460 const struct sof_amd_acp_desc *chip; 461 unsigned int addr; 462 int ret; 463 --- 70 unchanged lines hidden --- |