pxa2xx-i2s.c (7ebc8d56f407184a457dd5fc739cf39e423a25aa) pxa2xx-i2s.c (65ec1cd1e2c6228752d2f167b01e6d291014d249)
1/*
2 * pxa2xx-i2s.c -- ALSA Soc Audio Layer
3 *
4 * Copyright 2005 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * lrg@slimlogic.co.uk
7 *
8 * This program is free software; you can redistribute it and/or modify it

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19#include <linux/platform_device.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/initval.h>
23#include <sound/soc.h>
24#include <sound/pxa2xx-lib.h>
25
26#include <mach/hardware.h>
1/*
2 * pxa2xx-i2s.c -- ALSA Soc Audio Layer
3 *
4 * Copyright 2005 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * lrg@slimlogic.co.uk
7 *
8 * This program is free software; you can redistribute it and/or modify it

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19#include <linux/platform_device.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/initval.h>
23#include <sound/soc.h>
24#include <sound/pxa2xx-lib.h>
25
26#include <mach/hardware.h>
27#include <mach/dma.h>
28#include <mach/pxa2xx-gpio.h>
27#include <mach/pxa-regs.h>
29#include <mach/audio.h>
30
31#include "pxa2xx-pcm.h"
32#include "pxa2xx-i2s.h"
33
28#include <mach/audio.h>
29
30#include "pxa2xx-pcm.h"
31#include "pxa2xx-i2s.h"
32
34struct pxa2xx_gpio {
35 u32 sys;
36 u32 rx;
37 u32 tx;
38 u32 clk;
39 u32 frm;
40};
41
42/*
43 * I2S Controller Register and Bit Definitions
44 */
45#define SACR0 __REG(0x40400000) /* Global Control Register */
46#define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */
47#define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */
48#define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask Register */
49#define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear Register */

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101static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_in = {
102 .name = "I2S PCM Stereo in",
103 .dev_addr = __PREG(SADR),
104 .drcmr = &DRCMR(2),
105 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
106 DCMD_BURST32 | DCMD_WIDTH4,
107};
108
33/*
34 * I2S Controller Register and Bit Definitions
35 */
36#define SACR0 __REG(0x40400000) /* Global Control Register */
37#define SACR1 __REG(0x40400004) /* Serial Audio I 2 S/MSB-Justified Control Register */
38#define SASR0 __REG(0x4040000C) /* Serial Audio I 2 S/MSB-Justified Interface and FIFO Status Register */
39#define SAIMR __REG(0x40400014) /* Serial Audio Interrupt Mask Register */
40#define SAICR __REG(0x40400018) /* Serial Audio Interrupt Clear Register */

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92static struct pxa2xx_pcm_dma_params pxa2xx_i2s_pcm_stereo_in = {
93 .name = "I2S PCM Stereo in",
94 .dev_addr = __PREG(SADR),
95 .drcmr = &DRCMR(2),
96 .dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC |
97 DCMD_BURST32 | DCMD_WIDTH4,
98};
99
109static struct pxa2xx_gpio gpio_bus[] = {
110 { /* I2S SoC Slave */
111 .rx = GPIO29_SDATA_IN_I2S_MD,
112 .tx = GPIO30_SDATA_OUT_I2S_MD,
113 .clk = GPIO28_BITCLK_IN_I2S_MD,
114 .frm = GPIO31_SYNC_I2S_MD,
115 },
116 { /* I2S SoC Master */
117 .rx = GPIO29_SDATA_IN_I2S_MD,
118 .tx = GPIO30_SDATA_OUT_I2S_MD,
119 .clk = GPIO28_BITCLK_OUT_I2S_MD,
120 .frm = GPIO31_SYNC_I2S_MD,
121 },
122};
123
124static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream,
125 struct snd_soc_dai *dai)
126{
127 struct snd_soc_pcm_runtime *rtd = substream->private_data;
128 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
129
130 if (IS_ERR(clk_i2s))
131 return PTR_ERR(clk_i2s);

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176}
177
178static int pxa2xx_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
179 int clk_id, unsigned int freq, int dir)
180{
181 if (clk_id != PXA2XX_I2S_SYSCLK)
182 return -ENODEV;
183
100static int pxa2xx_i2s_startup(struct snd_pcm_substream *substream,
101 struct snd_soc_dai *dai)
102{
103 struct snd_soc_pcm_runtime *rtd = substream->private_data;
104 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
105
106 if (IS_ERR(clk_i2s))
107 return PTR_ERR(clk_i2s);

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152}
153
154static int pxa2xx_i2s_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
155 int clk_id, unsigned int freq, int dir)
156{
157 if (clk_id != PXA2XX_I2S_SYSCLK)
158 return -ENODEV;
159
184 if (pxa_i2s.master && dir == SND_SOC_CLOCK_OUT)
185 pxa_gpio_mode(gpio_bus[pxa_i2s.master].sys);
186
187 return 0;
188}
189
190static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream,
191 struct snd_pcm_hw_params *params,
192 struct snd_soc_dai *dai)
193{
194 struct snd_soc_pcm_runtime *rtd = substream->private_data;
195 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
196
160 return 0;
161}
162
163static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream,
164 struct snd_pcm_hw_params *params,
165 struct snd_soc_dai *dai)
166{
167 struct snd_soc_pcm_runtime *rtd = substream->private_data;
168 struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
169
197 pxa_gpio_mode(gpio_bus[pxa_i2s.master].rx);
198 pxa_gpio_mode(gpio_bus[pxa_i2s.master].tx);
199 pxa_gpio_mode(gpio_bus[pxa_i2s.master].frm);
200 pxa_gpio_mode(gpio_bus[pxa_i2s.master].clk);
201 BUG_ON(IS_ERR(clk_i2s));
202 clk_enable(clk_i2s);
203 pxa_i2s_wait();
204
205 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
206 cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_out;
207 else
208 cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_in;

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330#define pxa2xx_i2s_suspend NULL
331#define pxa2xx_i2s_resume NULL
332#endif
333
334#define PXA2XX_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
335 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
336 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000)
337
170 BUG_ON(IS_ERR(clk_i2s));
171 clk_enable(clk_i2s);
172 pxa_i2s_wait();
173
174 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
175 cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_out;
176 else
177 cpu_dai->dma_data = &pxa2xx_i2s_pcm_stereo_in;

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299#define pxa2xx_i2s_suspend NULL
300#define pxa2xx_i2s_resume NULL
301#endif
302
303#define PXA2XX_I2S_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
304 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
305 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000)
306
307static struct snd_soc_dai_ops pxa_i2s_dai_ops = {
308 .startup = pxa2xx_i2s_startup,
309 .shutdown = pxa2xx_i2s_shutdown,
310 .trigger = pxa2xx_i2s_trigger,
311 .hw_params = pxa2xx_i2s_hw_params,
312 .set_fmt = pxa2xx_i2s_set_dai_fmt,
313 .set_sysclk = pxa2xx_i2s_set_dai_sysclk,
314};
315
338struct snd_soc_dai pxa_i2s_dai = {
339 .name = "pxa2xx-i2s",
340 .id = 0,
341 .suspend = pxa2xx_i2s_suspend,
342 .resume = pxa2xx_i2s_resume,
343 .playback = {
344 .channels_min = 2,
345 .channels_max = 2,
346 .rates = PXA2XX_I2S_RATES,
347 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
348 .capture = {
349 .channels_min = 2,
350 .channels_max = 2,
351 .rates = PXA2XX_I2S_RATES,
352 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
316struct snd_soc_dai pxa_i2s_dai = {
317 .name = "pxa2xx-i2s",
318 .id = 0,
319 .suspend = pxa2xx_i2s_suspend,
320 .resume = pxa2xx_i2s_resume,
321 .playback = {
322 .channels_min = 2,
323 .channels_max = 2,
324 .rates = PXA2XX_I2S_RATES,
325 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
326 .capture = {
327 .channels_min = 2,
328 .channels_max = 2,
329 .rates = PXA2XX_I2S_RATES,
330 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
353 .ops = {
354 .startup = pxa2xx_i2s_startup,
355 .shutdown = pxa2xx_i2s_shutdown,
356 .trigger = pxa2xx_i2s_trigger,
357 .hw_params = pxa2xx_i2s_hw_params,
358 .set_fmt = pxa2xx_i2s_set_dai_fmt,
359 .set_sysclk = pxa2xx_i2s_set_dai_sysclk,
360 },
331 .ops = &pxa_i2s_dai_ops,
361};
362
363EXPORT_SYMBOL_GPL(pxa_i2s_dai);
364
365static int pxa2xx_i2s_probe(struct platform_device *dev)
366{
367 int ret;
368

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393 .driver = {
394 .name = "pxa2xx-i2s",
395 .owner = THIS_MODULE,
396 },
397};
398
399static int __init pxa2xx_i2s_init(void)
400{
332};
333
334EXPORT_SYMBOL_GPL(pxa_i2s_dai);
335
336static int pxa2xx_i2s_probe(struct platform_device *dev)
337{
338 int ret;
339

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364 .driver = {
365 .name = "pxa2xx-i2s",
366 .owner = THIS_MODULE,
367 },
368};
369
370static int __init pxa2xx_i2s_init(void)
371{
401 if (cpu_is_pxa27x())
402 gpio_bus[1].sys = GPIO113_I2S_SYSCLK_MD;
403 else
404 gpio_bus[1].sys = GPIO32_SYSCLK_I2S_MD;
405
406 clk_i2s = ERR_PTR(-ENOENT);
407 return platform_driver_register(&pxa2xx_i2s_driver);
408}
409
410static void __exit pxa2xx_i2s_exit(void)
411{
412 platform_driver_unregister(&pxa2xx_i2s_driver);
413}
414
415module_init(pxa2xx_i2s_init);
416module_exit(pxa2xx_i2s_exit);
417
418/* Module information */
419MODULE_AUTHOR("Liam Girdwood, lrg@slimlogic.co.uk");
420MODULE_DESCRIPTION("pxa2xx I2S SoC Interface");
421MODULE_LICENSE("GPL");
372 clk_i2s = ERR_PTR(-ENOENT);
373 return platform_driver_register(&pxa2xx_i2s_driver);
374}
375
376static void __exit pxa2xx_i2s_exit(void)
377{
378 platform_driver_unregister(&pxa2xx_i2s_driver);
379}
380
381module_init(pxa2xx_i2s_init);
382module_exit(pxa2xx_i2s_exit);
383
384/* Module information */
385MODULE_AUTHOR("Liam Girdwood, lrg@slimlogic.co.uk");
386MODULE_DESCRIPTION("pxa2xx I2S SoC Interface");
387MODULE_LICENSE("GPL");