avs.h (d070002a20fc071c6f14c2fd8ff5ebeabead8d2a) avs.h (2f1f570cd730c81807ae143a83766068dd82d577)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
4 *
5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
7 */
8

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37 int (* const reset)(struct avs_dev *, u32, bool);
38 int (* const stall)(struct avs_dev *, u32, bool);
39 irqreturn_t (* const irq_handler)(int, void *);
40 irqreturn_t (* const irq_thread)(int, void *);
41 void (* const int_control)(struct avs_dev *, bool);
42 int (* const load_basefw)(struct avs_dev *, struct firmware *);
43 int (* const load_lib)(struct avs_dev *, struct firmware *, u32);
44 int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32);
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
4 *
5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
7 */
8

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37 int (* const reset)(struct avs_dev *, u32, bool);
38 int (* const stall)(struct avs_dev *, u32, bool);
39 irqreturn_t (* const irq_handler)(int, void *);
40 irqreturn_t (* const irq_thread)(int, void *);
41 void (* const int_control)(struct avs_dev *, bool);
42 int (* const load_basefw)(struct avs_dev *, struct firmware *);
43 int (* const load_lib)(struct avs_dev *, struct firmware *, u32);
44 int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32);
45 int (* const coredump)(struct avs_dev *, union avs_notify_msg *);
45};
46
47#define avs_dsp_op(adev, op, ...) \
48 ((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__))
49
50#define AVS_PLATATTR_CLDMA BIT_ULL(0)
51#define AVS_PLATATTR_IMR BIT_ULL(1)
52

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159 * @busy_completion: BUSY-part of IPC i.e. receiving responses from FW
160 */
161struct avs_ipc {
162 struct device *dev;
163
164 struct avs_ipc_msg rx;
165 u32 default_timeout_ms;
166 bool ready;
46};
47
48#define avs_dsp_op(adev, op, ...) \
49 ((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__))
50
51#define AVS_PLATATTR_CLDMA BIT_ULL(0)
52#define AVS_PLATATTR_IMR BIT_ULL(1)
53

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160 * @busy_completion: BUSY-part of IPC i.e. receiving responses from FW
161 */
162struct avs_ipc {
163 struct device *dev;
164
165 struct avs_ipc_msg rx;
166 u32 default_timeout_ms;
167 bool ready;
168 atomic_t recovering;
167
168 bool rx_completed;
169 spinlock_t rx_lock;
170 struct mutex msg_mutex;
171 struct completion done_completion;
172 struct completion busy_completion;
169
170 bool rx_completed;
171 spinlock_t rx_lock;
172 struct mutex msg_mutex;
173 struct completion done_completion;
174 struct completion busy_completion;
175
176 struct work_struct recovery_work;
173};
174
175#define AVS_EIPC EREMOTEIO
176/*
177 * IPC handlers may return positive value (firmware error code) what denotes
178 * successful HOST <-> DSP communication yet failure to process specific request.
179 *
180 * Below macro converts returned value to linux kernel error code.

--- 98 unchanged lines hidden --- 		177};
178
179#define AVS_EIPC EREMOTEIO
180/*
181 * IPC handlers may return positive value (firmware error code) what denotes
182 * successful HOST <-> DSP communication yet failure to process specific request.
183 *
184 * Below macro converts returned value to linux kernel error code.

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