| fsl_asrc.c (2a267e7c41aa88215de2b542de797d03d16ecdfd) | fsl_asrc.c (b06c58c2a1eed571ea2a6640fdb85b7b00196b1e) |
|---|---|
| 1// SPDX-License-Identifier: GPL-2.0 2// 3// Freescale ASRC ALSA SoC Digital Audio Interface (DAI) driver 4// 5// Copyright (C) 2014 Freescale Semiconductor, Inc. 6// 7// Author: Nicolin Chen <nicoleotsuka@gmail.com> 8 --- 268 unchanged lines hidden (view full) --- 277 if (outrate == supported_asrc_rate[out]) 278 break; 279 280 if (out == ARRAY_SIZE(supported_asrc_rate)) { 281 pair_err("unsupported output sample rate: %dHz\n", outrate); 282 return -EINVAL; 283 } 284 | 1// SPDX-License-Identifier: GPL-2.0 2// 3// Freescale ASRC ALSA SoC Digital Audio Interface (DAI) driver 4// 5// Copyright (C) 2014 Freescale Semiconductor, Inc. 6// 7// Author: Nicolin Chen <nicoleotsuka@gmail.com> 8 --- 268 unchanged lines hidden (view full) --- 277 if (outrate == supported_asrc_rate[out]) 278 break; 279 280 if (out == ARRAY_SIZE(supported_asrc_rate)) { 281 pair_err("unsupported output sample rate: %dHz\n", outrate); 282 return -EINVAL; 283 } 284 |
| 285 if ((outrate > 8000 && outrate < 30000) && 286 (outrate/inrate > 24 || inrate/outrate > 8)) { | 285 if ((outrate >= 8000 && outrate <= 30000) && 286 (outrate > 24 * inrate || inrate > 8 * outrate)) { |
| 287 pair_err("exceed supported ratio range [1/24, 8] for \ 288 inrate/outrate: %d/%d\n", inrate, outrate); 289 return -EINVAL; 290 } 291 292 /* Validate input and output clock sources */ 293 clk_index[IN] = clk_map[IN][config->inclk]; 294 clk_index[OUT] = clk_map[OUT][config->outclk]; --- 763 unchanged lines hidden --- | 287 pair_err("exceed supported ratio range [1/24, 8] for \ 288 inrate/outrate: %d/%d\n", inrate, outrate); 289 return -EINVAL; 290 } 291 292 /* Validate input and output clock sources */ 293 clk_index[IN] = clk_map[IN][config->inclk]; 294 clk_index[OUT] = clk_map[OUT][config->outclk]; --- 763 unchanged lines hidden --- |