wm8990.c (d2fd5fe7ee3bc231e21aeb9ee120e0e61a79f8be) wm8990.c (0112b62b12e18b883e1027689acab8eaa8830bac)
1/*
2 * wm8990.c -- WM8990 ALSA Soc Audio driver
3 *
4 * Copyright 2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
1/*
2 * wm8990.c -- WM8990 ALSA Soc Audio driver
3 *
4 * Copyright 2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
20#include <linux/slab.h>
21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/soc.h>
25#include <sound/initval.h>
26#include <sound/tlv.h>
27#include <asm/div64.h>
28
29#include "wm8990.h"
30
31/* codec private data */
32struct wm8990_priv {
21#include <linux/slab.h>
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include <sound/initval.h>
27#include <sound/tlv.h>
28#include <asm/div64.h>
29
30#include "wm8990.h"
31
32/* codec private data */
33struct wm8990_priv {
33 enum snd_soc_control_type control_type;
34 struct regmap *regmap;
34 unsigned int sysclk;
35 unsigned int pcmclk;
36};
37
35 unsigned int sysclk;
36 unsigned int pcmclk;
37};
38
38static int wm8990_volatile_register(struct snd_soc_codec *codec,
39 unsigned int reg)
39static bool wm8990_volatile_register(struct device *dev, unsigned int reg)
40{
41 switch (reg) {
42 case WM8990_RESET:
43 return 1;
44 default:
45 return 0;
46 }
47}
48
40{
41 switch (reg) {
42 case WM8990_RESET:
43 return 1;
44 default:
45 return 0;
46 }
47}
48
49static const u16 wm8990_reg[] = {
50 0x8990, /* R0 - Reset */
51 0x0000, /* R1 - Power Management (1) */
52 0x6000, /* R2 - Power Management (2) */
53 0x0000, /* R3 - Power Management (3) */
54 0x4050, /* R4 - Audio Interface (1) */
55 0x4000, /* R5 - Audio Interface (2) */
56 0x01C8, /* R6 - Clocking (1) */
57 0x0000, /* R7 - Clocking (2) */
58 0x0040, /* R8 - Audio Interface (3) */
59 0x0040, /* R9 - Audio Interface (4) */
60 0x0004, /* R10 - DAC CTRL */
61 0x00C0, /* R11 - Left DAC Digital Volume */
62 0x00C0, /* R12 - Right DAC Digital Volume */
63 0x0000, /* R13 - Digital Side Tone */
64 0x0100, /* R14 - ADC CTRL */
65 0x00C0, /* R15 - Left ADC Digital Volume */
66 0x00C0, /* R16 - Right ADC Digital Volume */
67 0x0000, /* R17 */
68 0x0000, /* R18 - GPIO CTRL 1 */
69 0x1000, /* R19 - GPIO1 & GPIO2 */
70 0x1010, /* R20 - GPIO3 & GPIO4 */
71 0x1010, /* R21 - GPIO5 & GPIO6 */
72 0x8000, /* R22 - GPIOCTRL 2 */
73 0x0800, /* R23 - GPIO_POL */
74 0x008B, /* R24 - Left Line Input 1&2 Volume */
75 0x008B, /* R25 - Left Line Input 3&4 Volume */
76 0x008B, /* R26 - Right Line Input 1&2 Volume */
77 0x008B, /* R27 - Right Line Input 3&4 Volume */
78 0x0000, /* R28 - Left Output Volume */
79 0x0000, /* R29 - Right Output Volume */
80 0x0066, /* R30 - Line Outputs Volume */
81 0x0022, /* R31 - Out3/4 Volume */
82 0x0079, /* R32 - Left OPGA Volume */
83 0x0079, /* R33 - Right OPGA Volume */
84 0x0003, /* R34 - Speaker Volume */
85 0x0003, /* R35 - ClassD1 */
86 0x0000, /* R36 */
87 0x0100, /* R37 - ClassD3 */
88 0x0079, /* R38 - ClassD4 */
89 0x0000, /* R39 - Input Mixer1 */
90 0x0000, /* R40 - Input Mixer2 */
91 0x0000, /* R41 - Input Mixer3 */
92 0x0000, /* R42 - Input Mixer4 */
93 0x0000, /* R43 - Input Mixer5 */
94 0x0000, /* R44 - Input Mixer6 */
95 0x0000, /* R45 - Output Mixer1 */
96 0x0000, /* R46 - Output Mixer2 */
97 0x0000, /* R47 - Output Mixer3 */
98 0x0000, /* R48 - Output Mixer4 */
99 0x0000, /* R49 - Output Mixer5 */
100 0x0000, /* R50 - Output Mixer6 */
101 0x0180, /* R51 - Out3/4 Mixer */
102 0x0000, /* R52 - Line Mixer1 */
103 0x0000, /* R53 - Line Mixer2 */
104 0x0000, /* R54 - Speaker Mixer */
105 0x0000, /* R55 - Additional Control */
106 0x0000, /* R56 - AntiPOP1 */
107 0x0000, /* R57 - AntiPOP2 */
108 0x0000, /* R58 - MICBIAS */
109 0x0000, /* R59 */
110 0x0008, /* R60 - PLL1 */
111 0x0031, /* R61 - PLL2 */
112 0x0026, /* R62 - PLL3 */
113 0x0000, /* R63 - Driver internal */
49static const struct reg_default wm8990_reg_defaults[] = {
50 { 1, 0x0000 }, /* R1 - Power Management (1) */
51 { 2, 0x6000 }, /* R2 - Power Management (2) */
52 { 3, 0x0000 }, /* R3 - Power Management (3) */
53 { 4, 0x4050 }, /* R4 - Audio Interface (1) */
54 { 5, 0x4000 }, /* R5 - Audio Interface (2) */
55 { 6, 0x01C8 }, /* R6 - Clocking (1) */
56 { 7, 0x0000 }, /* R7 - Clocking (2) */
57 { 8, 0x0040 }, /* R8 - Audio Interface (3) */
58 { 9, 0x0040 }, /* R9 - Audio Interface (4) */
59 { 10, 0x0004 }, /* R10 - DAC CTRL */
60 { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */
61 { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */
62 { 13, 0x0000 }, /* R13 - Digital Side Tone */
63 { 14, 0x0100 }, /* R14 - ADC CTRL */
64 { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */
65 { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */
66
67 { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */
68 { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */
69 { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */
70 { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */
71 { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */
72 { 23, 0x0800 }, /* R23 - GPIO_POL */
73 { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */
74 { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */
75 { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */
76 { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */
77 { 28, 0x0000 }, /* R28 - Left Output Volume */
78 { 29, 0x0000 }, /* R29 - Right Output Volume */
79 { 30, 0x0066 }, /* R30 - Line Outputs Volume */
80 { 31, 0x0022 }, /* R31 - Out3/4 Volume */
81 { 32, 0x0079 }, /* R32 - Left OPGA Volume */
82 { 33, 0x0079 }, /* R33 - Right OPGA Volume */
83 { 34, 0x0003 }, /* R34 - Speaker Volume */
84 { 35, 0x0003 }, /* R35 - ClassD1 */
85
86 { 37, 0x0100 }, /* R37 - ClassD3 */
87 { 38, 0x0079 }, /* R38 - ClassD4 */
88 { 39, 0x0000 }, /* R39 - Input Mixer1 */
89 { 40, 0x0000 }, /* R40 - Input Mixer2 */
90 { 41, 0x0000 }, /* R41 - Input Mixer3 */
91 { 42, 0x0000 }, /* R42 - Input Mixer4 */
92 { 43, 0x0000 }, /* R43 - Input Mixer5 */
93 { 44, 0x0000 }, /* R44 - Input Mixer6 */
94 { 45, 0x0000 }, /* R45 - Output Mixer1 */
95 { 46, 0x0000 }, /* R46 - Output Mixer2 */
96 { 47, 0x0000 }, /* R47 - Output Mixer3 */
97 { 48, 0x0000 }, /* R48 - Output Mixer4 */
98 { 49, 0x0000 }, /* R49 - Output Mixer5 */
99 { 50, 0x0000 }, /* R50 - Output Mixer6 */
100 { 51, 0x0180 }, /* R51 - Out3/4 Mixer */
101 { 52, 0x0000 }, /* R52 - Line Mixer1 */
102 { 53, 0x0000 }, /* R53 - Line Mixer2 */
103 { 54, 0x0000 }, /* R54 - Speaker Mixer */
104 { 55, 0x0000 }, /* R55 - Additional Control */
105 { 56, 0x0000 }, /* R56 - AntiPOP1 */
106 { 57, 0x0000 }, /* R57 - AntiPOP2 */
107 { 58, 0x0000 }, /* R58 - MICBIAS */
108
109 { 60, 0x0008 }, /* R60 - PLL1 */
110 { 61, 0x0031 }, /* R61 - PLL2 */
111 { 62, 0x0026 }, /* R62 - PLL3 */
114};
115
116#define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0)
117
118static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0);
119
120static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0);
121

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1109 snd_soc_write(codec, WM8990_DAC_CTRL, val);
1110
1111 return 0;
1112}
1113
1114static int wm8990_set_bias_level(struct snd_soc_codec *codec,
1115 enum snd_soc_bias_level level)
1116{
112};
113
114#define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0)
115
116static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 600, 0);
117
118static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1650, 3000, 0);
119

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1107 snd_soc_write(codec, WM8990_DAC_CTRL, val);
1108
1109 return 0;
1110}
1111
1112static int wm8990_set_bias_level(struct snd_soc_codec *codec,
1113 enum snd_soc_bias_level level)
1114{
1115 struct wm8990_priv *wm8990 = snd_soc_codec_get_drvdata(codec);
1117 int ret;
1118
1119 switch (level) {
1120 case SND_SOC_BIAS_ON:
1121 break;
1122
1123 case SND_SOC_BIAS_PREPARE:
1124 /* VMID=2*50k */
1125 snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_1,
1126 WM8990_VMID_MODE_MASK, 0x2);
1127 break;
1128
1129 case SND_SOC_BIAS_STANDBY:
1130 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1116 int ret;
1117
1118 switch (level) {
1119 case SND_SOC_BIAS_ON:
1120 break;
1121
1122 case SND_SOC_BIAS_PREPARE:
1123 /* VMID=2*50k */
1124 snd_soc_update_bits(codec, WM8990_POWER_MANAGEMENT_1,
1125 WM8990_VMID_MODE_MASK, 0x2);
1126 break;
1127
1128 case SND_SOC_BIAS_STANDBY:
1129 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1131 ret = snd_soc_cache_sync(codec);
1130 ret = regcache_sync(wm8990->regmap);
1132 if (ret < 0) {
1133 dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
1134 return ret;
1135 }
1136
1137 /* Enable all output discharge bits */
1138 snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
1139 WM8990_DIS_RLINE | WM8990_DIS_OUT3 |

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1221 WM8990_DIS_ROUT);
1222
1223 /* Disable VREF */
1224 snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0);
1225
1226 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1227 snd_soc_write(codec, WM8990_ANTIPOP2, 0x0);
1228
1131 if (ret < 0) {
1132 dev_err(codec->dev, "Failed to sync cache: %d\n", ret);
1133 return ret;
1134 }
1135
1136 /* Enable all output discharge bits */
1137 snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE |
1138 WM8990_DIS_RLINE | WM8990_DIS_OUT3 |

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1220 WM8990_DIS_ROUT);
1221
1222 /* Disable VREF */
1223 snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0);
1224
1225 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1226 snd_soc_write(codec, WM8990_ANTIPOP2, 0x0);
1227
1229 codec->cache_sync = 1;
1228 regcache_mark_dirty(wm8990->regmap);
1230 break;
1231 }
1232
1233 codec->dapm.bias_level = level;
1234 return 0;
1235}
1236
1237#define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\

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1290/*
1291 * initialise the WM8990 driver
1292 * register the mixer and dsp interfaces with the kernel
1293 */
1294static int wm8990_probe(struct snd_soc_codec *codec)
1295{
1296 int ret;
1297
1229 break;
1230 }
1231
1232 codec->dapm.bias_level = level;
1233 return 0;
1234}
1235
1236#define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\

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1289/*
1290 * initialise the WM8990 driver
1291 * register the mixer and dsp interfaces with the kernel
1292 */
1293static int wm8990_probe(struct snd_soc_codec *codec)
1294{
1295 int ret;
1296
1298 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1297 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
1299 if (ret < 0) {
1300 printk(KERN_ERR "wm8990: failed to set cache I/O: %d\n", ret);
1301 return ret;
1302 }
1303
1304 wm8990_reset(codec);
1305
1306 /* charge output caps */

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1329}
1330
1331static struct snd_soc_codec_driver soc_codec_dev_wm8990 = {
1332 .probe = wm8990_probe,
1333 .remove = wm8990_remove,
1334 .suspend = wm8990_suspend,
1335 .resume = wm8990_resume,
1336 .set_bias_level = wm8990_set_bias_level,
1298 if (ret < 0) {
1299 printk(KERN_ERR "wm8990: failed to set cache I/O: %d\n", ret);
1300 return ret;
1301 }
1302
1303 wm8990_reset(codec);
1304
1305 /* charge output caps */

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1328}
1329
1330static struct snd_soc_codec_driver soc_codec_dev_wm8990 = {
1331 .probe = wm8990_probe,
1332 .remove = wm8990_remove,
1333 .suspend = wm8990_suspend,
1334 .resume = wm8990_resume,
1335 .set_bias_level = wm8990_set_bias_level,
1337 .reg_cache_size = ARRAY_SIZE(wm8990_reg),
1338 .reg_word_size = sizeof(u16),
1339 .reg_cache_default = wm8990_reg,
1340 .volatile_register = wm8990_volatile_register,
1341 .controls = wm8990_snd_controls,
1342 .num_controls = ARRAY_SIZE(wm8990_snd_controls),
1343 .dapm_widgets = wm8990_dapm_widgets,
1344 .num_dapm_widgets = ARRAY_SIZE(wm8990_dapm_widgets),
1345 .dapm_routes = wm8990_dapm_routes,
1346 .num_dapm_routes = ARRAY_SIZE(wm8990_dapm_routes),
1347};
1348
1336 .controls = wm8990_snd_controls,
1337 .num_controls = ARRAY_SIZE(wm8990_snd_controls),
1338 .dapm_widgets = wm8990_dapm_widgets,
1339 .num_dapm_widgets = ARRAY_SIZE(wm8990_dapm_widgets),
1340 .dapm_routes = wm8990_dapm_routes,
1341 .num_dapm_routes = ARRAY_SIZE(wm8990_dapm_routes),
1342};
1343
1344static const struct regmap_config wm8990_regmap = {
1345 .reg_bits = 8,
1346 .val_bits = 16,
1347
1348 .max_register = WM8990_PLL3,
1349 .volatile_reg = wm8990_volatile_register,
1350 .reg_defaults = wm8990_reg_defaults,
1351 .num_reg_defaults = ARRAY_SIZE(wm8990_reg_defaults),
1352 .cache_type = REGCACHE_RBTREE,
1353};
1354
1349static int wm8990_i2c_probe(struct i2c_client *i2c,
1350 const struct i2c_device_id *id)
1351{
1352 struct wm8990_priv *wm8990;
1353 int ret;
1354
1355 wm8990 = devm_kzalloc(&i2c->dev, sizeof(struct wm8990_priv),
1356 GFP_KERNEL);

--- 39 unchanged lines hidden --- 		1355static int wm8990_i2c_probe(struct i2c_client *i2c,
1356 const struct i2c_device_id *id)
1357{
1358 struct wm8990_priv *wm8990;
1359 int ret;
1360
1361 wm8990 = devm_kzalloc(&i2c->dev, sizeof(struct wm8990_priv),
1362 GFP_KERNEL);

--- 39 unchanged lines hidden ---