wcd939x.h (a1ff5a7d78a036d6c2178ee5acd6ba4946243800) wcd939x.h (a9d843e6b231e550f8141f27e930f90ded4edae2)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7#ifndef __WCD939X_H__
8#define __WCD939X_H__

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837#define WCD939X_DSD_HPHR_CFG0 (0x35a1)
838#define WCD939X_DSD_HPHR_CFG1 (0x35a2)
839#define WCD939X_DSD_HPHR_CFG2 (0x35a3)
840#define WCD939X_DSD_HPHR_CFG3 (0x35a4)
841#define WCD939X_DSD_HPHR_CFG4 (0x35a5)
842#define WCD939X_DSD_HPHR_CFG5 (0x35a6)
843#define WCD939X_MAX_REGISTER (WCD939X_DSD_HPHR_CFG5)
844
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7#ifndef __WCD939X_H__
8#define __WCD939X_H__

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837#define WCD939X_DSD_HPHR_CFG0 (0x35a1)
838#define WCD939X_DSD_HPHR_CFG1 (0x35a2)
839#define WCD939X_DSD_HPHR_CFG2 (0x35a3)
840#define WCD939X_DSD_HPHR_CFG3 (0x35a4)
841#define WCD939X_DSD_HPHR_CFG4 (0x35a5)
842#define WCD939X_DSD_HPHR_CFG5 (0x35a6)
843#define WCD939X_MAX_REGISTER (WCD939X_DSD_HPHR_CFG5)
844
845#define WCD939X_MAX_SWR_PORTS (6)
846#define WCD939X_MAX_RX_SWR_PORTS (6)
847#define WCD939X_MAX_TX_SWR_PORTS (4)
848#define WCD939X_MAX_SWR_CH_IDS (15)
849
850struct wcd939x_sdw_ch_info {
851 int port_num;
852 unsigned int ch_mask;
853};
854
855#define WCD_SDW_CH(id, pn, cmask) \
856 [id] = { \
857 .port_num = pn, \
858 .ch_mask = cmask, \
859 }
860
861enum wcd939x_tx_sdw_ports {
862 WCD939X_ADC_1_4_PORT = 1,
863 WCD939X_ADC_DMIC_1_2_PORT,
864 WCD939X_DMIC_0_3_MBHC_PORT,
865 WCD939X_DMIC_3_7_PORT,
845#define WCD939X_MAX_SWR_CH_IDS (15)
846
847struct wcd939x_sdw_ch_info {
848 int port_num;
849 unsigned int ch_mask;
850};
851
852#define WCD_SDW_CH(id, pn, cmask) \
853 [id] = { \
854 .port_num = pn, \
855 .ch_mask = cmask, \
856 }
857
858enum wcd939x_tx_sdw_ports {
859 WCD939X_ADC_1_4_PORT = 1,
860 WCD939X_ADC_DMIC_1_2_PORT,
861 WCD939X_DMIC_0_3_MBHC_PORT,
862 WCD939X_DMIC_3_7_PORT,
863 WCD939X_MAX_TX_SWR_PORTS = WCD939X_DMIC_3_7_PORT,
866};
867
868enum wcd939x_tx_sdw_channels {
869 WCD939X_ADC1,
870 WCD939X_ADC2,
871 WCD939X_ADC3,
872 WCD939X_ADC4,
873 WCD939X_DMIC0,

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883
884enum wcd939x_rx_sdw_ports {
885 WCD939X_HPH_PORT = 1,
886 WCD939X_CLSH_PORT,
887 WCD939X_COMP_PORT,
888 WCD939X_LO_PORT,
889 WCD939X_DSD_PORT,
890 WCD939X_HIFI_PCM_PORT,
864};
865
866enum wcd939x_tx_sdw_channels {
867 WCD939X_ADC1,
868 WCD939X_ADC2,
869 WCD939X_ADC3,
870 WCD939X_ADC4,
871 WCD939X_DMIC0,

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881
882enum wcd939x_rx_sdw_ports {
883 WCD939X_HPH_PORT = 1,
884 WCD939X_CLSH_PORT,
885 WCD939X_COMP_PORT,
886 WCD939X_LO_PORT,
887 WCD939X_DSD_PORT,
888 WCD939X_HIFI_PCM_PORT,
889 WCD939X_MAX_RX_SWR_PORTS = WCD939X_HIFI_PCM_PORT,
890 WCD939X_MAX_SWR_PORTS = WCD939X_MAX_RX_SWR_PORTS,
891};
892
893enum wcd939x_rx_sdw_channels {
894 WCD939X_HPH_L,
895 WCD939X_HPH_R,
896 WCD939X_CLSH,
897 WCD939X_COMP_L,
898 WCD939X_COMP_R,

--- 79 unchanged lines hidden --- 		891};
892
893enum wcd939x_rx_sdw_channels {
894 WCD939X_HPH_L,
895 WCD939X_HPH_R,
896 WCD939X_CLSH,
897 WCD939X_COMP_L,
898 WCD939X_COMP_R,

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