sta32x.c (dd0a11815a339d6deeea8357574f8126a8404c92) sta32x.c (025c3fa9256d4c54506b7a29dc3befac54f5c68d)
1/*
2 * Codec driver for ST STA32x 2.1-channel high-efficiency digital audio system
3 *
4 * Copyright: 2011 Raumfeld GmbH
5 * Author: Johannes Stezenbach <js@sig21.net>
6 *
7 * based on code from:
8 * Wolfson Microelectronics PLC.

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182 TLV_DB_RANGE_HEAD(5),
183 0, 0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 0),
184 1, 2, TLV_DB_SCALE_ITEM(-3800, 200, 0),
185 3, 4, TLV_DB_SCALE_ITEM(-3300, 200, 0),
186 5, 12, TLV_DB_SCALE_ITEM(-3000, 200, 0),
187 13, 16, TLV_DB_SCALE_ITEM(-1500, 300, 0),
188};
189
1/*
2 * Codec driver for ST STA32x 2.1-channel high-efficiency digital audio system
3 *
4 * Copyright: 2011 Raumfeld GmbH
5 * Author: Johannes Stezenbach <js@sig21.net>
6 *
7 * based on code from:
8 * Wolfson Microelectronics PLC.

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182 TLV_DB_RANGE_HEAD(5),
183 0, 0, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 0),
184 1, 2, TLV_DB_SCALE_ITEM(-3800, 200, 0),
185 3, 4, TLV_DB_SCALE_ITEM(-3300, 200, 0),
186 5, 12, TLV_DB_SCALE_ITEM(-3000, 200, 0),
187 13, 16, TLV_DB_SCALE_ITEM(-1500, 300, 0),
188};
189
190static const struct soc_enum sta32x_drc_ac_enum =
191 SOC_ENUM_SINGLE(STA32X_CONFD, STA32X_CONFD_DRC_SHIFT,
192 2, sta32x_drc_ac);
193static const struct soc_enum sta32x_auto_eq_enum =
194 SOC_ENUM_SINGLE(STA32X_AUTO1, STA32X_AUTO1_AMEQ_SHIFT,
195 3, sta32x_auto_eq_mode);
196static const struct soc_enum sta32x_auto_gc_enum =
197 SOC_ENUM_SINGLE(STA32X_AUTO1, STA32X_AUTO1_AMGC_SHIFT,
198 4, sta32x_auto_gc_mode);
199static const struct soc_enum sta32x_auto_xo_enum =
200 SOC_ENUM_SINGLE(STA32X_AUTO2, STA32X_AUTO2_XO_SHIFT,
201 16, sta32x_auto_xo_mode);
202static const struct soc_enum sta32x_preset_eq_enum =
203 SOC_ENUM_SINGLE(STA32X_AUTO3, STA32X_AUTO3_PEQ_SHIFT,
204 32, sta32x_preset_eq_mode);
205static const struct soc_enum sta32x_limiter_ch1_enum =
206 SOC_ENUM_SINGLE(STA32X_C1CFG, STA32X_CxCFG_LS_SHIFT,
207 3, sta32x_limiter_select);
208static const struct soc_enum sta32x_limiter_ch2_enum =
209 SOC_ENUM_SINGLE(STA32X_C2CFG, STA32X_CxCFG_LS_SHIFT,
210 3, sta32x_limiter_select);
211static const struct soc_enum sta32x_limiter_ch3_enum =
212 SOC_ENUM_SINGLE(STA32X_C3CFG, STA32X_CxCFG_LS_SHIFT,
213 3, sta32x_limiter_select);
214static const struct soc_enum sta32x_limiter1_attack_rate_enum =
215 SOC_ENUM_SINGLE(STA32X_L1AR, STA32X_LxA_SHIFT,
216 16, sta32x_limiter_attack_rate);
217static const struct soc_enum sta32x_limiter2_attack_rate_enum =
218 SOC_ENUM_SINGLE(STA32X_L2AR, STA32X_LxA_SHIFT,
219 16, sta32x_limiter_attack_rate);
220static const struct soc_enum sta32x_limiter1_release_rate_enum =
221 SOC_ENUM_SINGLE(STA32X_L1AR, STA32X_LxR_SHIFT,
222 16, sta32x_limiter_release_rate);
223static const struct soc_enum sta32x_limiter2_release_rate_enum =
224 SOC_ENUM_SINGLE(STA32X_L2AR, STA32X_LxR_SHIFT,
225 16, sta32x_limiter_release_rate);
190static SOC_ENUM_SINGLE_DECL(sta32x_drc_ac_enum,
191 STA32X_CONFD, STA32X_CONFD_DRC_SHIFT,
192 sta32x_drc_ac);
193static SOC_ENUM_SINGLE_DECL(sta32x_auto_eq_enum,
194 STA32X_AUTO1, STA32X_AUTO1_AMEQ_SHIFT,
195 sta32x_auto_eq_mode);
196static SOC_ENUM_SINGLE_DECL(sta32x_auto_gc_enum,
197 STA32X_AUTO1, STA32X_AUTO1_AMGC_SHIFT,
198 sta32x_auto_gc_mode);
199static SOC_ENUM_SINGLE_DECL(sta32x_auto_xo_enum,
200 STA32X_AUTO2, STA32X_AUTO2_XO_SHIFT,
201 sta32x_auto_xo_mode);
202static SOC_ENUM_SINGLE_DECL(sta32x_preset_eq_enum,
203 STA32X_AUTO3, STA32X_AUTO3_PEQ_SHIFT,
204 sta32x_preset_eq_mode);
205static SOC_ENUM_SINGLE_DECL(sta32x_limiter_ch1_enum,
206 STA32X_C1CFG, STA32X_CxCFG_LS_SHIFT,
207 sta32x_limiter_select);
208static SOC_ENUM_SINGLE_DECL(sta32x_limiter_ch2_enum,
209 STA32X_C2CFG, STA32X_CxCFG_LS_SHIFT,
210 sta32x_limiter_select);
211static SOC_ENUM_SINGLE_DECL(sta32x_limiter_ch3_enum,
212 STA32X_C3CFG, STA32X_CxCFG_LS_SHIFT,
213 sta32x_limiter_select);
214static SOC_ENUM_SINGLE_DECL(sta32x_limiter1_attack_rate_enum,
215 STA32X_L1AR, STA32X_LxA_SHIFT,
216 sta32x_limiter_attack_rate);
217static SOC_ENUM_SINGLE_DECL(sta32x_limiter2_attack_rate_enum,
218 STA32X_L2AR, STA32X_LxA_SHIFT,
219 sta32x_limiter_attack_rate);
220static SOC_ENUM_SINGLE_DECL(sta32x_limiter1_release_rate_enum,
221 STA32X_L1AR, STA32X_LxR_SHIFT,
222 sta32x_limiter_release_rate);
223static SOC_ENUM_SINGLE_DECL(sta32x_limiter2_release_rate_enum,
224 STA32X_L2AR, STA32X_LxR_SHIFT,
225 sta32x_limiter_release_rate);
226
227/* byte array controls for setting biquad, mixer, scaling coefficients;
228 * for biquads all five coefficients need to be set in one go,
229 * mixer and pre/postscale coefs can be set individually;
230 * each coef is 24bit, the bytes are ordered in the same way
231 * as given in the STA32x data sheet (big endian; b1, b2, a1, a2, b0)
232 */
233

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227/* byte array controls for setting biquad, mixer, scaling coefficients;
228 * for biquads all five coefficients need to be set in one go,
229 * mixer and pre/postscale coefs can be set individually;
230 * each coef is 24bit, the bytes are ordered in the same way
231 * as given in the STA32x data sheet (big endian; b1, b2, a1, a2, b0)
232 */
233

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