sgtl5000.c (c9f289701540baeef9ac7c9977d67a7259f404db) sgtl5000.c (aa7812737f2877e192d57626cbe8825cc7cf6de9)
1// SPDX-License-Identifier: GPL-2.0
2//
3// sgtl5000.c -- SGTL5000 ALSA SoC Audio driver
4//
5// Copyright 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
6
7#include <linux/module.h>
8#include <linux/moduleparam.h>

--- 1639 unchanged lines hidden (view full) ---

1648 /* reconfigure the clocks in case we're using the PLL */
1649 ret = regmap_write(sgtl5000->regmap,
1650 SGTL5000_CHIP_CLK_CTRL,
1651 SGTL5000_CHIP_CLK_CTRL_DEFAULT);
1652 if (ret)
1653 dev_err(&client->dev,
1654 "Error %d initializing CHIP_CLK_CTRL\n", ret);
1655
1// SPDX-License-Identifier: GPL-2.0
2//
3// sgtl5000.c -- SGTL5000 ALSA SoC Audio driver
4//
5// Copyright 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
6
7#include <linux/module.h>
8#include <linux/moduleparam.h>

--- 1639 unchanged lines hidden (view full) ---

1648 /* reconfigure the clocks in case we're using the PLL */
1649 ret = regmap_write(sgtl5000->regmap,
1650 SGTL5000_CHIP_CLK_CTRL,
1651 SGTL5000_CHIP_CLK_CTRL_DEFAULT);
1652 if (ret)
1653 dev_err(&client->dev,
1654 "Error %d initializing CHIP_CLK_CTRL\n", ret);
1655
1656 /* Mute everything to avoid pop from the following power-up */
1657 ret = regmap_write(sgtl5000->regmap, SGTL5000_CHIP_ANA_CTRL,
1658 SGTL5000_CHIP_ANA_CTRL_DEFAULT);
1659 if (ret) {
1660 dev_err(&client->dev,
1661 "Error %d muting outputs via CHIP_ANA_CTRL\n", ret);
1662 goto disable_clk;
1663 }
1664
1665 /*
1666 * If VAG is powered-on (e.g. from previous boot), it would be disabled
1667 * by the write to ANA_POWER in later steps of the probe code. This
1668 * may create a loud pop even with all outputs muted. The proper way
1669 * to circumvent this is disabling the bit first and waiting the proper
1670 * cool-down time.
1671 */
1672 ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ANA_POWER, &value);
1673 if (ret) {
1674 dev_err(&client->dev, "Failed to read ANA_POWER: %d\n", ret);
1675 goto disable_clk;
1676 }
1677 if (value & SGTL5000_VAG_POWERUP) {
1678 ret = regmap_update_bits(sgtl5000->regmap,
1679 SGTL5000_CHIP_ANA_POWER,
1680 SGTL5000_VAG_POWERUP,
1681 0);
1682 if (ret) {
1683 dev_err(&client->dev, "Error %d disabling VAG\n", ret);
1684 goto disable_clk;
1685 }
1686
1687 msleep(SGTL5000_VAG_POWERDOWN_DELAY);
1688 }
1689
1656 /* Follow section 2.2.1.1 of AN3663 */
1657 ana_pwr = SGTL5000_ANA_POWER_DEFAULT;
1658 if (sgtl5000->num_supplies <= VDDD) {
1659 /* internal VDDD at 1.2V */
1660 ret = regmap_update_bits(sgtl5000->regmap,
1661 SGTL5000_CHIP_LINREG_CTRL,
1662 SGTL5000_LINREG_VDDD_MASK,
1663 LINREG_VDDD);

--- 136 unchanged lines hidden --- 		1690 /* Follow section 2.2.1.1 of AN3663 */
1691 ana_pwr = SGTL5000_ANA_POWER_DEFAULT;
1692 if (sgtl5000->num_supplies <= VDDD) {
1693 /* internal VDDD at 1.2V */
1694 ret = regmap_update_bits(sgtl5000->regmap,
1695 SGTL5000_CHIP_LINREG_CTRL,
1696 SGTL5000_LINREG_VDDD_MASK,
1697 LINREG_VDDD);

--- 136 unchanged lines hidden ---