rt5682s.c (a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0) rt5682s.c (577d71544871b075a25a09e4c5aa31008850c0a8)
1// SPDX-License-Identifier: GPL-2.0-only
2//
3// rt5682s.c -- RT5682I-VS ALSA SoC audio component driver
4//
5// Copyright 2021 Realtek Semiconductor Corp.
6// Author: Derek Fang <derek.fang@realtek.com>
7//
8

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1318{
1319 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1320 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1321 int on = 0;
1322
1323 if (SND_SOC_DAPM_EVENT_ON(event))
1324 on = 1;
1325
1// SPDX-License-Identifier: GPL-2.0-only
2//
3// rt5682s.c -- RT5682I-VS ALSA SoC audio component driver
4//
5// Copyright 2021 Realtek Semiconductor Corp.
6// Author: Derek Fang <derek.fang@realtek.com>
7//
8

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1318{
1319 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1320 struct rt5682s_priv *rt5682s = snd_soc_component_get_drvdata(component);
1321 int on = 0;
1322
1323 if (SND_SOC_DAPM_EVENT_ON(event))
1324 on = 1;
1325
1326 if (!strcmp(w->name, "I2S1") && !rt5682s->wclk_enabled)
1326 if (!snd_soc_dapm_widget_name_cmp(w, "I2S1") && !rt5682s->wclk_enabled)
1327 rt5682s_set_i2s(rt5682s, RT5682S_AIF1, on);
1327 rt5682s_set_i2s(rt5682s, RT5682S_AIF1, on);
1328 else if (!strcmp(w->name, "I2S2"))
1328 else if (!snd_soc_dapm_widget_name_cmp(w, "I2S2"))
1329 rt5682s_set_i2s(rt5682s, RT5682S_AIF2, on);
1330
1331 return 0;
1332}
1333
1334static int is_sys_clk_from_plla(struct snd_soc_dapm_widget *w,
1335 struct snd_soc_dapm_widget *sink)
1336{

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2966 device_property_read_u32(dev, "realtek,jd-src",
2967 &rt5682s->pdata.jd_src);
2968 device_property_read_u32(dev, "realtek,dmic-clk-rate-hz",
2969 &rt5682s->pdata.dmic_clk_rate);
2970 device_property_read_u32(dev, "realtek,dmic-delay-ms",
2971 &rt5682s->pdata.dmic_delay);
2972 device_property_read_u32(dev, "realtek,amic-delay-ms",
2973 &rt5682s->pdata.amic_delay);
1329 rt5682s_set_i2s(rt5682s, RT5682S_AIF2, on);
1330
1331 return 0;
1332}
1333
1334static int is_sys_clk_from_plla(struct snd_soc_dapm_widget *w,
1335 struct snd_soc_dapm_widget *sink)
1336{

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2966 device_property_read_u32(dev, "realtek,jd-src",
2967 &rt5682s->pdata.jd_src);
2968 device_property_read_u32(dev, "realtek,dmic-clk-rate-hz",
2969 &rt5682s->pdata.dmic_clk_rate);
2970 device_property_read_u32(dev, "realtek,dmic-delay-ms",
2971 &rt5682s->pdata.dmic_delay);
2972 device_property_read_u32(dev, "realtek,amic-delay-ms",
2973 &rt5682s->pdata.amic_delay);
2974 device_property_read_u32(dev, "realtek,ldo-sel",
2975 &rt5682s->pdata.ldo_dacref);
2974
2975 if (device_property_read_string_array(dev, "clock-output-names",
2976 rt5682s->pdata.dai_clk_names,
2977 RT5682S_DAI_NUM_CLKS) < 0)
2978 dev_warn(dev, "Using default DAI clk names: %s, %s\n",
2979 rt5682s->pdata.dai_clk_names[RT5682S_DAI_WCLK_IDX],
2980 rt5682s->pdata.dai_clk_names[RT5682S_DAI_BCLK_IDX]);
2981

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3245 regmap_update_bits(rt5682s->regmap, RT5682S_PAD_DRIVING_CTRL,
3246 RT5682S_PAD_DRV_GP3_MASK, RT5682S_PAD_DRV_GP3_HIGH);
3247 break;
3248 default:
3249 dev_warn(&i2c->dev, "invalid DMIC_CLK pin\n");
3250 break;
3251 }
3252
2976
2977 if (device_property_read_string_array(dev, "clock-output-names",
2978 rt5682s->pdata.dai_clk_names,
2979 RT5682S_DAI_NUM_CLKS) < 0)
2980 dev_warn(dev, "Using default DAI clk names: %s, %s\n",
2981 rt5682s->pdata.dai_clk_names[RT5682S_DAI_WCLK_IDX],
2982 rt5682s->pdata.dai_clk_names[RT5682S_DAI_BCLK_IDX]);
2983

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3247 regmap_update_bits(rt5682s->regmap, RT5682S_PAD_DRIVING_CTRL,
3248 RT5682S_PAD_DRV_GP3_MASK, RT5682S_PAD_DRV_GP3_HIGH);
3249 break;
3250 default:
3251 dev_warn(&i2c->dev, "invalid DMIC_CLK pin\n");
3252 break;
3253 }
3254
3255 /* LDO output voltage control */
3256 switch (rt5682s->pdata.ldo_dacref) {
3257 case RT5682S_LDO_1_607V:
3258 break;
3259 case RT5682S_LDO_1_5V:
3260 regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
3261 RT5682S_LDO_DACREF_MASK, RT5682S_LDO_DACREF_1_5V);
3262 break;
3263 case RT5682S_LDO_1_406V:
3264 regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
3265 RT5682S_LDO_DACREF_MASK, RT5682S_LDO_DACREF_1_406V);
3266 break;
3267 case RT5682S_LDO_1_731V:
3268 regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
3269 RT5682S_LDO_DACREF_MASK, RT5682S_LDO_DACREF_1_731V);
3270 break;
3271 default:
3272 dev_warn(&i2c->dev, "invalid LDO output setting.\n");
3273 break;
3274 }
3275
3253 INIT_DELAYED_WORK(&rt5682s->jack_detect_work, rt5682s_jack_detect_handler);
3254 INIT_DELAYED_WORK(&rt5682s->jd_check_work, rt5682s_jd_check_handler);
3255
3256 if (i2c->irq) {
3257 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, rt5682s_irq,
3258 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
3259 "rt5682s", rt5682s);
3260 if (!ret)

--- 60 unchanged lines hidden --- 		3276 INIT_DELAYED_WORK(&rt5682s->jack_detect_work, rt5682s_jack_detect_handler);
3277 INIT_DELAYED_WORK(&rt5682s->jd_check_work, rt5682s_jd_check_handler);
3278
3279 if (i2c->irq) {
3280 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, rt5682s_irq,
3281 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
3282 "rt5682s", rt5682s);
3283 if (!ret)

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