rt1308-sdw.c (1136fa0c07de570dc17858745af8be169d1440ba) | rt1308-sdw.c (abed17fdf92e4b3bfe336f7872270e0924cc4463) |
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1// SPDX-License-Identifier: GPL-2.0 2// 3// rt1308-sdw.c -- rt1308 ALSA SoC audio driver 4// 5// Copyright(c) 2019 Realtek Semiconductor Corp. 6// 7// 8#include <linux/delay.h> --- 36 unchanged lines hidden (view full) --- 45{ 46 switch (reg) { 47 case 0x2f01 ... 0x2f07: 48 case 0x3000 ... 0x3001: 49 case 0x3004 ... 0x3005: 50 case 0x3008: 51 case 0x300a: 52 case 0xc000: | 1// SPDX-License-Identifier: GPL-2.0 2// 3// rt1308-sdw.c -- rt1308 ALSA SoC audio driver 4// 5// Copyright(c) 2019 Realtek Semiconductor Corp. 6// 7// 8#include <linux/delay.h> --- 36 unchanged lines hidden (view full) --- 45{ 46 switch (reg) { 47 case 0x2f01 ... 0x2f07: 48 case 0x3000 ... 0x3001: 49 case 0x3004 ... 0x3005: 50 case 0x3008: 51 case 0x300a: 52 case 0xc000: |
53 case 0xc860 ... 0xc863: 54 case 0xc870 ... 0xc873: |
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53 return true; 54 default: 55 return false; 56 } 57} 58 59static const struct regmap_config rt1308_sdw_regmap = { 60 .reg_bits = 32, --- 93 unchanged lines hidden (view full) --- 154 /* set the timeout values */ 155 prop->clk_stop_timeout = 20; 156 157 dev_dbg(&slave->dev, "%s\n", __func__); 158 159 return 0; 160} 161 | 55 return true; 56 default: 57 return false; 58 } 59} 60 61static const struct regmap_config rt1308_sdw_regmap = { 62 .reg_bits = 32, --- 93 unchanged lines hidden (view full) --- 156 /* set the timeout values */ 157 prop->clk_stop_timeout = 20; 158 159 dev_dbg(&slave->dev, "%s\n", __func__); 160 161 return 0; 162} 163 |
164static void rt1308_apply_calib_params(struct rt1308_sdw_priv *rt1308) 165{ 166 unsigned int efuse_m_btl_l, efuse_m_btl_r, tmp; 167 unsigned int efuse_c_btl_l, efuse_c_btl_r; 168 169 /* read efuse to apply calibration parameters */ 170 regmap_write(rt1308->regmap, 0xc7f0, 0x04); 171 regmap_write(rt1308->regmap, 0xc7f1, 0xfe); 172 msleep(100); 173 regmap_write(rt1308->regmap, 0xc7f0, 0x44); 174 msleep(20); 175 regmap_write(rt1308->regmap, 0xc240, 0x10); 176 177 regmap_read(rt1308->regmap, 0xc861, &tmp); 178 efuse_m_btl_l = tmp; 179 regmap_read(rt1308->regmap, 0xc860, &tmp); 180 efuse_m_btl_l = efuse_m_btl_l | (tmp << 8); 181 regmap_read(rt1308->regmap, 0xc863, &tmp); 182 efuse_c_btl_l = tmp; 183 regmap_read(rt1308->regmap, 0xc862, &tmp); 184 efuse_c_btl_l = efuse_c_btl_l | (tmp << 8); 185 regmap_read(rt1308->regmap, 0xc871, &tmp); 186 efuse_m_btl_r = tmp; 187 regmap_read(rt1308->regmap, 0xc870, &tmp); 188 efuse_m_btl_r = efuse_m_btl_r | (tmp << 8); 189 regmap_read(rt1308->regmap, 0xc873, &tmp); 190 efuse_c_btl_r = tmp; 191 regmap_read(rt1308->regmap, 0xc872, &tmp); 192 efuse_c_btl_r = efuse_c_btl_r | (tmp << 8); 193 dev_dbg(&rt1308->sdw_slave->dev, "%s m_btl_l=0x%x, m_btl_r=0x%x\n", __func__, 194 efuse_m_btl_l, efuse_m_btl_r); 195 dev_dbg(&rt1308->sdw_slave->dev, "%s c_btl_l=0x%x, c_btl_r=0x%x\n", __func__, 196 efuse_c_btl_l, efuse_c_btl_r); 197} 198 |
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162static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) 163{ 164 struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev); 165 int ret = 0; | 199static int rt1308_io_init(struct device *dev, struct sdw_slave *slave) 200{ 201 struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev); 202 int ret = 0; |
166 unsigned int efuse_m_btl_l, efuse_m_btl_r, tmp; 167 unsigned int efuse_c_btl_l, efuse_c_btl_r; | |
168 169 if (rt1308->hw_init) 170 return 0; 171 172 if (rt1308->first_hw_init) { 173 regcache_cache_only(rt1308->regmap, false); 174 regcache_cache_bypass(rt1308->regmap, true); 175 } --- 15 unchanged lines hidden (view full) --- 191 pm_runtime_enable(&slave->dev); 192 } 193 194 pm_runtime_get_noresume(&slave->dev); 195 196 /* sw reset */ 197 regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0); 198 | 203 204 if (rt1308->hw_init) 205 return 0; 206 207 if (rt1308->first_hw_init) { 208 regcache_cache_only(rt1308->regmap, false); 209 regcache_cache_bypass(rt1308->regmap, true); 210 } --- 15 unchanged lines hidden (view full) --- 226 pm_runtime_enable(&slave->dev); 227 } 228 229 pm_runtime_get_noresume(&slave->dev); 230 231 /* sw reset */ 232 regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0); 233 |
199 /* read efuse */ 200 regmap_write(rt1308->regmap, 0xc360, 0x01); 201 regmap_write(rt1308->regmap, 0xc361, 0x80); 202 regmap_write(rt1308->regmap, 0xc7f0, 0x04); 203 regmap_write(rt1308->regmap, 0xc7f1, 0xfe); 204 msleep(100); 205 regmap_write(rt1308->regmap, 0xc7f0, 0x44); 206 msleep(20); 207 regmap_write(rt1308->regmap, 0xc240, 0x10); 208 209 regmap_read(rt1308->regmap, 0xc861, &tmp); 210 efuse_m_btl_l = tmp; 211 regmap_read(rt1308->regmap, 0xc860, &tmp); 212 efuse_m_btl_l = efuse_m_btl_l | (tmp << 8); 213 regmap_read(rt1308->regmap, 0xc863, &tmp); 214 efuse_c_btl_l = tmp; 215 regmap_read(rt1308->regmap, 0xc862, &tmp); 216 efuse_c_btl_l = efuse_c_btl_l | (tmp << 8); 217 regmap_read(rt1308->regmap, 0xc871, &tmp); 218 efuse_m_btl_r = tmp; 219 regmap_read(rt1308->regmap, 0xc870, &tmp); 220 efuse_m_btl_r = efuse_m_btl_r | (tmp << 8); 221 regmap_read(rt1308->regmap, 0xc873, &tmp); 222 efuse_c_btl_r = tmp; 223 regmap_read(rt1308->regmap, 0xc872, &tmp); 224 efuse_c_btl_r = efuse_c_btl_r | (tmp << 8); 225 dev_dbg(&slave->dev, "%s m_btl_l=0x%x, m_btl_r=0x%x\n", __func__, 226 efuse_m_btl_l, efuse_m_btl_r); 227 dev_dbg(&slave->dev, "%s c_btl_l=0x%x, c_btl_r=0x%x\n", __func__, 228 efuse_c_btl_l, efuse_c_btl_r); 229 | |
230 /* initial settings */ 231 regmap_write(rt1308->regmap, 0xc103, 0xc0); 232 regmap_write(rt1308->regmap, 0xc030, 0x17); 233 regmap_write(rt1308->regmap, 0xc031, 0x81); 234 regmap_write(rt1308->regmap, 0xc032, 0x26); 235 regmap_write(rt1308->regmap, 0xc040, 0x80); 236 regmap_write(rt1308->regmap, 0xc041, 0x80); 237 regmap_write(rt1308->regmap, 0xc042, 0x06); --- 80 unchanged lines hidden (view full) --- 318 return 0; 319} 320 321static int rt1308_classd_event(struct snd_soc_dapm_widget *w, 322 struct snd_kcontrol *kcontrol, int event) 323{ 324 struct snd_soc_component *component = 325 snd_soc_dapm_to_component(w->dapm); | 234 /* initial settings */ 235 regmap_write(rt1308->regmap, 0xc103, 0xc0); 236 regmap_write(rt1308->regmap, 0xc030, 0x17); 237 regmap_write(rt1308->regmap, 0xc031, 0x81); 238 regmap_write(rt1308->regmap, 0xc032, 0x26); 239 regmap_write(rt1308->regmap, 0xc040, 0x80); 240 regmap_write(rt1308->regmap, 0xc041, 0x80); 241 regmap_write(rt1308->regmap, 0xc042, 0x06); --- 80 unchanged lines hidden (view full) --- 322 return 0; 323} 324 325static int rt1308_classd_event(struct snd_soc_dapm_widget *w, 326 struct snd_kcontrol *kcontrol, int event) 327{ 328 struct snd_soc_component *component = 329 snd_soc_dapm_to_component(w->dapm); |
330 struct rt1308_sdw_priv *rt1308 = 331 snd_soc_component_get_drvdata(component); |
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326 327 switch (event) { 328 case SND_SOC_DAPM_POST_PMU: 329 msleep(30); 330 snd_soc_component_update_bits(component, 331 RT1308_SDW_OFFSET | (RT1308_POWER_STATUS << 4), 332 0x3, 0x3); 333 msleep(40); | 332 333 switch (event) { 334 case SND_SOC_DAPM_POST_PMU: 335 msleep(30); 336 snd_soc_component_update_bits(component, 337 RT1308_SDW_OFFSET | (RT1308_POWER_STATUS << 4), 338 0x3, 0x3); 339 msleep(40); |
340 rt1308_apply_calib_params(rt1308); |
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334 break; 335 case SND_SOC_DAPM_PRE_PMD: 336 snd_soc_component_update_bits(component, 337 RT1308_SDW_OFFSET | (RT1308_POWER_STATUS << 4), 338 0x3, 0); 339 usleep_range(150000, 200000); 340 break; 341 --- 411 unchanged lines hidden --- | 341 break; 342 case SND_SOC_DAPM_PRE_PMD: 343 snd_soc_component_update_bits(component, 344 RT1308_SDW_OFFSET | (RT1308_POWER_STATUS << 4), 345 0x3, 0); 346 usleep_range(150000, 200000); 347 break; 348 --- 411 unchanged lines hidden --- |