max98090.c (ba674435e428168e01390c4e34bedc5ee9015834) max98090.c (fb180283c00b435019bd9500ae027872da9faa3b)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
4 *
5 * Copyright 2011-2012 Maxim Integrated Products
6 */
7
8#include <linux/delay.h>

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1576}
1577
1578static int max98090_dai_set_fmt(struct snd_soc_dai *codec_dai,
1579 unsigned int fmt)
1580{
1581 struct snd_soc_component *component = codec_dai->component;
1582 struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component);
1583 struct max98090_cdata *cdata;
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * max98090.c -- MAX98090 ALSA SoC Audio driver
4 *
5 * Copyright 2011-2012 Maxim Integrated Products
6 */
7
8#include <linux/delay.h>

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1576}
1577
1578static int max98090_dai_set_fmt(struct snd_soc_dai *codec_dai,
1579 unsigned int fmt)
1580{
1581 struct snd_soc_component *component = codec_dai->component;
1582 struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component);
1583 struct max98090_cdata *cdata;
1584 u8 regval;
1584 u8 regval, tdm_regval;
1585
1586 max98090->dai_fmt = fmt;
1587 cdata = &max98090->dai[0];
1588
1589 if (fmt != cdata->fmt) {
1590 cdata->fmt = fmt;
1591
1592 regval = 0;
1585
1586 max98090->dai_fmt = fmt;
1587 cdata = &max98090->dai[0];
1588
1589 if (fmt != cdata->fmt) {
1590 cdata->fmt = fmt;
1591
1592 regval = 0;
1593 tdm_regval = 0;
1593 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
1594 case SND_SOC_DAIFMT_CBC_CFC:
1595 /* Set to consumer mode PLL - MAS mode off */
1596 snd_soc_component_write(component,
1597 M98090_REG_CLOCK_RATIO_NI_MSB, 0x00);
1598 snd_soc_component_write(component,
1599 M98090_REG_CLOCK_RATIO_NI_LSB, 0x00);
1600 snd_soc_component_update_bits(component, M98090_REG_CLOCK_MODE,

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1630 regval |= M98090_DLY_MASK;
1631 break;
1632 case SND_SOC_DAIFMT_LEFT_J:
1633 break;
1634 case SND_SOC_DAIFMT_RIGHT_J:
1635 regval |= M98090_RJ_MASK;
1636 break;
1637 case SND_SOC_DAIFMT_DSP_A:
1594 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
1595 case SND_SOC_DAIFMT_CBC_CFC:
1596 /* Set to consumer mode PLL - MAS mode off */
1597 snd_soc_component_write(component,
1598 M98090_REG_CLOCK_RATIO_NI_MSB, 0x00);
1599 snd_soc_component_write(component,
1600 M98090_REG_CLOCK_RATIO_NI_LSB, 0x00);
1601 snd_soc_component_update_bits(component, M98090_REG_CLOCK_MODE,

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1631 regval |= M98090_DLY_MASK;
1632 break;
1633 case SND_SOC_DAIFMT_LEFT_J:
1634 break;
1635 case SND_SOC_DAIFMT_RIGHT_J:
1636 regval |= M98090_RJ_MASK;
1637 break;
1638 case SND_SOC_DAIFMT_DSP_A:
1638 /* Not supported mode */
1639 tdm_regval |= M98090_TDM_MASK;
1640 break;
1639 default:
1640 dev_err(component->dev, "DAI format unsupported");
1641 return -EINVAL;
1642 }
1643
1644 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1645 case SND_SOC_DAIFMT_NB_NF:
1646 break;

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1659 }
1660
1661 /*
1662 * This accommodates an inverted logic in the MAX98090 chip
1663 * for Bit Clock Invert (BCI). The inverted logic is only
1664 * seen for the case of TDM mode. The remaining cases have
1665 * normal logic.
1666 */
1641 default:
1642 dev_err(component->dev, "DAI format unsupported");
1643 return -EINVAL;
1644 }
1645
1646 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1647 case SND_SOC_DAIFMT_NB_NF:
1648 break;

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1661 }
1662
1663 /*
1664 * This accommodates an inverted logic in the MAX98090 chip
1665 * for Bit Clock Invert (BCI). The inverted logic is only
1666 * seen for the case of TDM mode. The remaining cases have
1667 * normal logic.
1668 */
1667 if (max98090->tdm_slots > 1)
1669 if (tdm_regval)
1668 regval ^= M98090_BCI_MASK;
1669
1670 snd_soc_component_write(component,
1671 M98090_REG_INTERFACE_FORMAT, regval);
1670 regval ^= M98090_BCI_MASK;
1671
1672 snd_soc_component_write(component,
1673 M98090_REG_INTERFACE_FORMAT, regval);
1674
1675 regval = 0;
1676 if (tdm_regval)
1677 regval = max98090->tdm_lslot << M98090_TDM_SLOTL_SHIFT |
1678 max98090->tdm_rslot << M98090_TDM_SLOTR_SHIFT |
1679 0 << M98090_TDM_SLOTDLY_SHIFT;
1680
1681 snd_soc_component_write(component, M98090_REG_TDM_FORMAT, regval);
1682 snd_soc_component_write(component, M98090_REG_TDM_CONTROL, tdm_regval);
1672 }
1673
1674 return 0;
1675}
1676
1677static int max98090_set_tdm_slot(struct snd_soc_dai *codec_dai,
1678 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
1679{
1680 struct snd_soc_component *component = codec_dai->component;
1681 struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component);
1683 }
1684
1685 return 0;
1686}
1687
1688static int max98090_set_tdm_slot(struct snd_soc_dai *codec_dai,
1689 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
1690{
1691 struct snd_soc_component *component = codec_dai->component;
1692 struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component);
1682 struct max98090_cdata *cdata;
1683 cdata = &max98090->dai[0];
1684
1685 if (slots < 0 || slots > 4)
1686 return -EINVAL;
1687
1693
1694 if (slots < 0 || slots > 4)
1695 return -EINVAL;
1696
1688 max98090->tdm_slots = slots;
1689 max98090->tdm_width = slot_width;
1697 if (slot_width != 16)
1698 return -EINVAL;
1690
1699
1691 if (max98090->tdm_slots > 1) {
1692 /* SLOTL SLOTR SLOTDLY */
1693 snd_soc_component_write(component, M98090_REG_TDM_FORMAT,
1694 0 << M98090_TDM_SLOTL_SHIFT |
1695 1 << M98090_TDM_SLOTR_SHIFT |
1696 0 << M98090_TDM_SLOTDLY_SHIFT);
1700 if (rx_mask != tx_mask)
1701 return -EINVAL;
1697
1702
1698 /* FSW TDM */
1699 snd_soc_component_update_bits(component, M98090_REG_TDM_CONTROL,
1700 M98090_TDM_MASK,
1701 M98090_TDM_MASK);
1702 }
1703 if (!rx_mask)
1704 return -EINVAL;
1703
1705
1704 /*
1705 * Normally advisable to set TDM first, but this permits either order
1706 */
1707 cdata->fmt = 0;
1708 max98090_dai_set_fmt(codec_dai, max98090->dai_fmt);
1706 max98090->tdm_slots = slots;
1707 max98090->tdm_lslot = ffs(rx_mask) - 1;
1708 max98090->tdm_rslot = fls(rx_mask) - 1;
1709
1710 return 0;
1711}
1712
1713static int max98090_set_bias_level(struct snd_soc_component *component,
1714 enum snd_soc_bias_level level)
1715{
1716 struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component);

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2403 cdata = &max98090->dai[0];
2404 cdata->rate = (unsigned)-1;
2405 cdata->fmt = (unsigned)-1;
2406
2407 max98090->lin_state = 0;
2408 max98090->pa1en = 0;
2409 max98090->pa2en = 0;
2410
1709
1710 return 0;
1711}
1712
1713static int max98090_set_bias_level(struct snd_soc_component *component,
1714 enum snd_soc_bias_level level)
1715{
1716 struct max98090_priv *max98090 = snd_soc_component_get_drvdata(component);

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2403 cdata = &max98090->dai[0];
2404 cdata->rate = (unsigned)-1;
2405 cdata->fmt = (unsigned)-1;
2406
2407 max98090->lin_state = 0;
2408 max98090->pa1en = 0;
2409 max98090->pa2en = 0;
2410
2411 max98090->tdm_lslot = 0;
2412 max98090->tdm_rslot = 1;
2413
2411 ret = snd_soc_component_read(component, M98090_REG_REVISION_ID);
2412 if (ret < 0) {
2413 dev_err(component->dev, "Failed to read device revision: %d\n",
2414 ret);
2415 goto err_access;
2416 }
2417
2418 if ((ret >= M98090_REVA) && (ret <= M98090_REVA + 0x0f)) {

--- 285 unchanged lines hidden --- 		2414 ret = snd_soc_component_read(component, M98090_REG_REVISION_ID);
2415 if (ret < 0) {
2416 dev_err(component->dev, "Failed to read device revision: %d\n",
2417 ret);
2418 goto err_access;
2419 }
2420
2421 if ((ret >= M98090_REVA) && (ret <= M98090_REVA + 0x0f)) {

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