max98090.c (8896bc3e089b39d077c7afbf785166aac28e5151) max98090.c (e5b94083d0996b4c69674c8a5563c2eb272557ba)
1/*
2 * max98090.c -- MAX98090 ALSA SoC Audio driver
3 *
4 * Copyright 2011-2012 Maxim Integrated Products
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

--- 346 unchanged lines hidden (view full) ---

355 "Failed to reset codec: %d\n", ret);
356 return ret;
357 }
358
359 msleep(20);
360 return ret;
361}
362
1/*
2 * max98090.c -- MAX98090 ALSA SoC Audio driver
3 *
4 * Copyright 2011-2012 Maxim Integrated Products
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.

--- 346 unchanged lines hidden (view full) ---

355 "Failed to reset codec: %d\n", ret);
356 return ret;
357 }
358
359 msleep(20);
360 return ret;
361}
362
363static const DECLARE_TLV_DB_RANGE(max98090_micboost_tlv,
363static const unsigned int max98090_micboost_tlv[] = {
364 TLV_DB_RANGE_HEAD(2),
364 0, 1, TLV_DB_SCALE_ITEM(0, 2000, 0),
365 0, 1, TLV_DB_SCALE_ITEM(0, 2000, 0),
365 2, 2, TLV_DB_SCALE_ITEM(3000, 0, 0)
366);
366 2, 2, TLV_DB_SCALE_ITEM(3000, 0, 0),
367};
367
368static const DECLARE_TLV_DB_SCALE(max98090_mic_tlv, 0, 100, 0);
369
370static const DECLARE_TLV_DB_SCALE(max98090_line_single_ended_tlv,
371 -600, 600, 0);
372
368
369static const DECLARE_TLV_DB_SCALE(max98090_mic_tlv, 0, 100, 0);
370
371static const DECLARE_TLV_DB_SCALE(max98090_line_single_ended_tlv,
372 -600, 600, 0);
373
373static const DECLARE_TLV_DB_RANGE(max98090_line_tlv,
374static const unsigned int max98090_line_tlv[] = {
375 TLV_DB_RANGE_HEAD(2),
374 0, 3, TLV_DB_SCALE_ITEM(-600, 300, 0),
376 0, 3, TLV_DB_SCALE_ITEM(-600, 300, 0),
375 4, 5, TLV_DB_SCALE_ITEM(1400, 600, 0)
376);
377 4, 5, TLV_DB_SCALE_ITEM(1400, 600, 0),
378};
377
378static const DECLARE_TLV_DB_SCALE(max98090_avg_tlv, 0, 600, 0);
379static const DECLARE_TLV_DB_SCALE(max98090_av_tlv, -1200, 100, 0);
380
381static const DECLARE_TLV_DB_SCALE(max98090_dvg_tlv, 0, 600, 0);
382static const DECLARE_TLV_DB_SCALE(max98090_dv_tlv, -1500, 100, 0);
383
384static const DECLARE_TLV_DB_SCALE(max98090_sidetone_tlv, -6050, 200, 0);
385
386static const DECLARE_TLV_DB_SCALE(max98090_alc_tlv, -1500, 100, 0);
387static const DECLARE_TLV_DB_SCALE(max98090_alcmakeup_tlv, 0, 100, 0);
388static const DECLARE_TLV_DB_SCALE(max98090_alccomp_tlv, -3100, 100, 0);
389static const DECLARE_TLV_DB_SCALE(max98090_drcexp_tlv, -6600, 100, 0);
390static const DECLARE_TLV_DB_SCALE(max98090_sdg_tlv, 50, 200, 0);
391
379
380static const DECLARE_TLV_DB_SCALE(max98090_avg_tlv, 0, 600, 0);
381static const DECLARE_TLV_DB_SCALE(max98090_av_tlv, -1200, 100, 0);
382
383static const DECLARE_TLV_DB_SCALE(max98090_dvg_tlv, 0, 600, 0);
384static const DECLARE_TLV_DB_SCALE(max98090_dv_tlv, -1500, 100, 0);
385
386static const DECLARE_TLV_DB_SCALE(max98090_sidetone_tlv, -6050, 200, 0);
387
388static const DECLARE_TLV_DB_SCALE(max98090_alc_tlv, -1500, 100, 0);
389static const DECLARE_TLV_DB_SCALE(max98090_alcmakeup_tlv, 0, 100, 0);
390static const DECLARE_TLV_DB_SCALE(max98090_alccomp_tlv, -3100, 100, 0);
391static const DECLARE_TLV_DB_SCALE(max98090_drcexp_tlv, -6600, 100, 0);
392static const DECLARE_TLV_DB_SCALE(max98090_sdg_tlv, 50, 200, 0);
393
392static const DECLARE_TLV_DB_RANGE(max98090_mixout_tlv,
394static const unsigned int max98090_mixout_tlv[] = {
395 TLV_DB_RANGE_HEAD(2),
393 0, 1, TLV_DB_SCALE_ITEM(-1200, 250, 0),
396 0, 1, TLV_DB_SCALE_ITEM(-1200, 250, 0),
394 2, 3, TLV_DB_SCALE_ITEM(-600, 600, 0)
395);
397 2, 3, TLV_DB_SCALE_ITEM(-600, 600, 0),
398};
396
399
397static const DECLARE_TLV_DB_RANGE(max98090_hp_tlv,
400static const unsigned int max98090_hp_tlv[] = {
401 TLV_DB_RANGE_HEAD(5),
398 0, 6, TLV_DB_SCALE_ITEM(-6700, 400, 0),
399 7, 14, TLV_DB_SCALE_ITEM(-4000, 300, 0),
400 15, 21, TLV_DB_SCALE_ITEM(-1700, 200, 0),
401 22, 27, TLV_DB_SCALE_ITEM(-400, 100, 0),
402 0, 6, TLV_DB_SCALE_ITEM(-6700, 400, 0),
403 7, 14, TLV_DB_SCALE_ITEM(-4000, 300, 0),
404 15, 21, TLV_DB_SCALE_ITEM(-1700, 200, 0),
405 22, 27, TLV_DB_SCALE_ITEM(-400, 100, 0),
402 28, 31, TLV_DB_SCALE_ITEM(150, 50, 0)
403);
406 28, 31, TLV_DB_SCALE_ITEM(150, 50, 0),
407};
404
408
405static const DECLARE_TLV_DB_RANGE(max98090_spk_tlv,
409static const unsigned int max98090_spk_tlv[] = {
410 TLV_DB_RANGE_HEAD(5),
406 0, 4, TLV_DB_SCALE_ITEM(-4800, 400, 0),
407 5, 10, TLV_DB_SCALE_ITEM(-2900, 300, 0),
408 11, 14, TLV_DB_SCALE_ITEM(-1200, 200, 0),
409 15, 29, TLV_DB_SCALE_ITEM(-500, 100, 0),
411 0, 4, TLV_DB_SCALE_ITEM(-4800, 400, 0),
412 5, 10, TLV_DB_SCALE_ITEM(-2900, 300, 0),
413 11, 14, TLV_DB_SCALE_ITEM(-1200, 200, 0),
414 15, 29, TLV_DB_SCALE_ITEM(-500, 100, 0),
410 30, 39, TLV_DB_SCALE_ITEM(950, 50, 0)
411);
415 30, 39, TLV_DB_SCALE_ITEM(950, 50, 0),
416};
412
417
413static const DECLARE_TLV_DB_RANGE(max98090_rcv_lout_tlv,
418static const unsigned int max98090_rcv_lout_tlv[] = {
419 TLV_DB_RANGE_HEAD(5),
414 0, 6, TLV_DB_SCALE_ITEM(-6200, 400, 0),
415 7, 14, TLV_DB_SCALE_ITEM(-3500, 300, 0),
416 15, 21, TLV_DB_SCALE_ITEM(-1200, 200, 0),
417 22, 27, TLV_DB_SCALE_ITEM(100, 100, 0),
420 0, 6, TLV_DB_SCALE_ITEM(-6200, 400, 0),
421 7, 14, TLV_DB_SCALE_ITEM(-3500, 300, 0),
422 15, 21, TLV_DB_SCALE_ITEM(-1200, 200, 0),
423 22, 27, TLV_DB_SCALE_ITEM(100, 100, 0),
418 28, 31, TLV_DB_SCALE_ITEM(650, 50, 0)
419);
424 28, 31, TLV_DB_SCALE_ITEM(650, 50, 0),
425};
420
421static int max98090_get_enab_tlv(struct snd_kcontrol *kcontrol,
422 struct snd_ctl_elem_value *ucontrol)
423{
424 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
425 struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec);
426 struct soc_mixer_control *mc =
427 (struct soc_mixer_control *)kcontrol->private_value;

--- 411 unchanged lines hidden (view full) ---

839 val << M98090_MIC_PA1EN_SHIFT);
840 else
841 snd_soc_update_bits(codec, w->reg, M98090_MIC_PA2EN_MASK,
842 val << M98090_MIC_PA2EN_SHIFT);
843
844 return 0;
845}
846
426
427static int max98090_get_enab_tlv(struct snd_kcontrol *kcontrol,
428 struct snd_ctl_elem_value *ucontrol)
429{
430 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
431 struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec);
432 struct soc_mixer_control *mc =
433 (struct soc_mixer_control *)kcontrol->private_value;

--- 411 unchanged lines hidden (view full) ---

845 val << M98090_MIC_PA1EN_SHIFT);
846 else
847 snd_soc_update_bits(codec, w->reg, M98090_MIC_PA2EN_MASK,
848 val << M98090_MIC_PA2EN_SHIFT);
849
850 return 0;
851}
852
853static int max98090_shdn_event(struct snd_soc_dapm_widget *w,
854 struct snd_kcontrol *kcontrol, int event)
855{
856 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
857 struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec);
858
859 if (event & SND_SOC_DAPM_POST_PMU)
860 max98090->shdn_pending = true;
861
862 return 0;
863
864}
865
847static const char *mic1_mux_text[] = { "IN12", "IN56" };
848
849static SOC_ENUM_SINGLE_DECL(mic1_mux_enum,
850 M98090_REG_INPUT_MODE,
851 M98090_EXTMIC1_SHIFT,
852 mic1_mux_text);
853
854static const struct snd_kcontrol_new max98090_mic1_mux =

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1147 M98090_MBEN_SHIFT, 0, NULL, 0),
1148 SND_SOC_DAPM_SUPPLY("SHDN", M98090_REG_DEVICE_SHUTDOWN,
1149 M98090_SHDNN_SHIFT, 0, NULL, 0),
1150 SND_SOC_DAPM_SUPPLY("SDIEN", M98090_REG_IO_CONFIGURATION,
1151 M98090_SDIEN_SHIFT, 0, NULL, 0),
1152 SND_SOC_DAPM_SUPPLY("SDOEN", M98090_REG_IO_CONFIGURATION,
1153 M98090_SDOEN_SHIFT, 0, NULL, 0),
1154 SND_SOC_DAPM_SUPPLY("DMICL_ENA", M98090_REG_DIGITAL_MIC_ENABLE,
866static const char *mic1_mux_text[] = { "IN12", "IN56" };
867
868static SOC_ENUM_SINGLE_DECL(mic1_mux_enum,
869 M98090_REG_INPUT_MODE,
870 M98090_EXTMIC1_SHIFT,
871 mic1_mux_text);
872
873static const struct snd_kcontrol_new max98090_mic1_mux =

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1166 M98090_MBEN_SHIFT, 0, NULL, 0),
1167 SND_SOC_DAPM_SUPPLY("SHDN", M98090_REG_DEVICE_SHUTDOWN,
1168 M98090_SHDNN_SHIFT, 0, NULL, 0),
1169 SND_SOC_DAPM_SUPPLY("SDIEN", M98090_REG_IO_CONFIGURATION,
1170 M98090_SDIEN_SHIFT, 0, NULL, 0),
1171 SND_SOC_DAPM_SUPPLY("SDOEN", M98090_REG_IO_CONFIGURATION,
1172 M98090_SDOEN_SHIFT, 0, NULL, 0),
1173 SND_SOC_DAPM_SUPPLY("DMICL_ENA", M98090_REG_DIGITAL_MIC_ENABLE,
1155 M98090_DIGMICL_SHIFT, 0, NULL, 0),
1174 M98090_DIGMICL_SHIFT, 0, max98090_shdn_event,
1175 SND_SOC_DAPM_POST_PMU),
1156 SND_SOC_DAPM_SUPPLY("DMICR_ENA", M98090_REG_DIGITAL_MIC_ENABLE,
1176 SND_SOC_DAPM_SUPPLY("DMICR_ENA", M98090_REG_DIGITAL_MIC_ENABLE,
1157 M98090_DIGMICR_SHIFT, 0, NULL, 0),
1177 M98090_DIGMICR_SHIFT, 0, max98090_shdn_event,
1178 SND_SOC_DAPM_POST_PMU),
1158 SND_SOC_DAPM_SUPPLY("AHPF", M98090_REG_FILTER_CONFIG,
1159 M98090_AHPF_SHIFT, 0, NULL, 0),
1160
1161/*
1162 * Note: Sysclk and misc power supplies are taken care of by SHDN
1163 */
1164
1165 SND_SOC_DAPM_MUX("MIC1 Mux", SND_SOC_NOPM,

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1194 SND_SOC_DAPM_MIXER("Left ADC Mixer", SND_SOC_NOPM, 0, 0,
1195 &max98090_left_adc_mixer_controls[0],
1196 ARRAY_SIZE(max98090_left_adc_mixer_controls)),
1197
1198 SND_SOC_DAPM_MIXER("Right ADC Mixer", SND_SOC_NOPM, 0, 0,
1199 &max98090_right_adc_mixer_controls[0],
1200 ARRAY_SIZE(max98090_right_adc_mixer_controls)),
1201
1179 SND_SOC_DAPM_SUPPLY("AHPF", M98090_REG_FILTER_CONFIG,
1180 M98090_AHPF_SHIFT, 0, NULL, 0),
1181
1182/*
1183 * Note: Sysclk and misc power supplies are taken care of by SHDN
1184 */
1185
1186 SND_SOC_DAPM_MUX("MIC1 Mux", SND_SOC_NOPM,

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1215 SND_SOC_DAPM_MIXER("Left ADC Mixer", SND_SOC_NOPM, 0, 0,
1216 &max98090_left_adc_mixer_controls[0],
1217 ARRAY_SIZE(max98090_left_adc_mixer_controls)),
1218
1219 SND_SOC_DAPM_MIXER("Right ADC Mixer", SND_SOC_NOPM, 0, 0,
1220 &max98090_right_adc_mixer_controls[0],
1221 ARRAY_SIZE(max98090_right_adc_mixer_controls)),
1222
1202 SND_SOC_DAPM_ADC("ADCL", NULL, M98090_REG_INPUT_ENABLE,
1203 M98090_ADLEN_SHIFT, 0),
1204 SND_SOC_DAPM_ADC("ADCR", NULL, M98090_REG_INPUT_ENABLE,
1205 M98090_ADREN_SHIFT, 0),
1223 SND_SOC_DAPM_ADC_E("ADCL", NULL, M98090_REG_INPUT_ENABLE,
1224 M98090_ADLEN_SHIFT, 0, max98090_shdn_event,
1225 SND_SOC_DAPM_POST_PMU),
1226 SND_SOC_DAPM_ADC_E("ADCR", NULL, M98090_REG_INPUT_ENABLE,
1227 M98090_ADREN_SHIFT, 0, max98090_shdn_event,
1228 SND_SOC_DAPM_POST_PMU),
1206
1207 SND_SOC_DAPM_AIF_OUT("AIFOUTL", "HiFi Capture", 0,
1208 SND_SOC_NOPM, 0, 0),
1209 SND_SOC_DAPM_AIF_OUT("AIFOUTR", "HiFi Capture", 1,
1210 SND_SOC_NOPM, 0, 0),
1211
1212 SND_SOC_DAPM_MUX("LBENL Mux", SND_SOC_NOPM,
1213 0, 0, &max98090_lbenl_mux),

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2525 cancel_delayed_work_sync(&max98090->pll_det_enable_work);
2526 cancel_work_sync(&max98090->pll_det_disable_work);
2527 cancel_work_sync(&max98090->pll_work);
2528 max98090->codec = NULL;
2529
2530 return 0;
2531}
2532
1229
1230 SND_SOC_DAPM_AIF_OUT("AIFOUTL", "HiFi Capture", 0,
1231 SND_SOC_NOPM, 0, 0),
1232 SND_SOC_DAPM_AIF_OUT("AIFOUTR", "HiFi Capture", 1,
1233 SND_SOC_NOPM, 0, 0),
1234
1235 SND_SOC_DAPM_MUX("LBENL Mux", SND_SOC_NOPM,
1236 0, 0, &max98090_lbenl_mux),

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2548 cancel_delayed_work_sync(&max98090->pll_det_enable_work);
2549 cancel_work_sync(&max98090->pll_det_disable_work);
2550 cancel_work_sync(&max98090->pll_work);
2551 max98090->codec = NULL;
2552
2553 return 0;
2554}
2555
2556static void max98090_seq_notifier(struct snd_soc_dapm_context *dapm,
2557 enum snd_soc_dapm_type event, int subseq)
2558{
2559 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm);
2560 struct max98090_priv *max98090 = snd_soc_codec_get_drvdata(codec);
2561
2562 if (max98090->shdn_pending) {
2563 snd_soc_update_bits(codec, M98090_REG_DEVICE_SHUTDOWN,
2564 M98090_SHDNN_MASK, 0);
2565 msleep(40);
2566 snd_soc_update_bits(codec, M98090_REG_DEVICE_SHUTDOWN,
2567 M98090_SHDNN_MASK, M98090_SHDNN_MASK);
2568 max98090->shdn_pending = false;
2569 }
2570}
2571
2533static struct snd_soc_codec_driver soc_codec_dev_max98090 = {
2534 .probe = max98090_probe,
2535 .remove = max98090_remove,
2572static struct snd_soc_codec_driver soc_codec_dev_max98090 = {
2573 .probe = max98090_probe,
2574 .remove = max98090_remove,
2575 .seq_notifier = max98090_seq_notifier,
2536 .set_bias_level = max98090_set_bias_level,
2537};
2538
2539static const struct regmap_config max98090_regmap = {
2540 .reg_bits = 8,
2541 .val_bits = 8,
2542
2543 .max_register = MAX98090_MAX_REGISTER,

--- 183 unchanged lines hidden --- 		2576 .set_bias_level = max98090_set_bias_level,
2577};
2578
2579static const struct regmap_config max98090_regmap = {
2580 .reg_bits = 8,
2581 .val_bits = 8,
2582
2583 .max_register = MAX98090_MAX_REGISTER,

--- 183 unchanged lines hidden ---