inno_rk3036.c (715a1284d89a740b197b3bad5eb20d36a397382f) inno_rk3036.c (d5d396c8b01e1fea696c68d255c2d7206de6499f)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver of Inno codec for rk3036 by Rockchip Inc.
4 *
5 * Author: Rockchip Inc.
6 * Author: Zheng ShunQian<zhengsq@rock-chips.com>
7 */
8

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320 .playback = {
321 .stream_name = "Playback",
322 .channels_min = 1,
323 .channels_max = 2,
324 .rates = RK3036_CODEC_RATES,
325 .formats = RK3036_CODEC_FMTS,
326 },
327 .ops = &rk3036_codec_dai_ops,
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver of Inno codec for rk3036 by Rockchip Inc.
4 *
5 * Author: Rockchip Inc.
6 * Author: Zheng ShunQian<zhengsq@rock-chips.com>
7 */
8

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320 .playback = {
321 .stream_name = "Playback",
322 .channels_min = 1,
323 .channels_max = 2,
324 .rates = RK3036_CODEC_RATES,
325 .formats = RK3036_CODEC_FMTS,
326 },
327 .ops = &rk3036_codec_dai_ops,
328 .symmetric_rates = 1,
328 .symmetric_rate = 1,
329 },
330};
331
332static void rk3036_codec_reset(struct snd_soc_component *component)
333{
334 snd_soc_component_write(component, INNO_R00,
335 INNO_R00_CSR_RESET | INNO_R00_CDCR_RESET);
336 snd_soc_component_write(component, INNO_R00,

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329 },
330};
331
332static void rk3036_codec_reset(struct snd_soc_component *component)
333{
334 snd_soc_component_write(component, INNO_R00,
335 INNO_R00_CSR_RESET | INNO_R00_CDCR_RESET);
336 snd_soc_component_write(component, INNO_R00,

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