cs35l36.c (c37fe6aff89cb0d842993fe2f69e48bf3ebe0ab0) cs35l36.c (4e7f0ea0e2e73851cd988f7c334c01d131048abf)
1// SPDX-License-Identifier: GPL-2.0
2//
3// cs35l36.c -- CS35L36 ALSA SoC audio driver
4//
5// Copyright 2018 Cirrus Logic, Inc.
6//
7// Author: James Schulman <james.schulman@cirrus.com>
8

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751 {"SPK", NULL, "Main AMP"},
752};
753
754static int cs35l36_set_dai_fmt(struct snd_soc_dai *component_dai,
755 unsigned int fmt)
756{
757 struct cs35l36_private *cs35l36 =
758 snd_soc_component_get_drvdata(component_dai->component);
1// SPDX-License-Identifier: GPL-2.0
2//
3// cs35l36.c -- CS35L36 ALSA SoC audio driver
4//
5// Copyright 2018 Cirrus Logic, Inc.
6//
7// Author: James Schulman <james.schulman@cirrus.com>
8

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751 {"SPK", NULL, "Main AMP"},
752};
753
754static int cs35l36_set_dai_fmt(struct snd_soc_dai *component_dai,
755 unsigned int fmt)
756{
757 struct cs35l36_private *cs35l36 =
758 snd_soc_component_get_drvdata(component_dai->component);
759 unsigned int asp_fmt, lrclk_fmt, sclk_fmt, slave_mode, clk_frc;
759 unsigned int asp_fmt, lrclk_fmt, sclk_fmt, clock_provider, clk_frc;
760
760
761 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
762 case SND_SOC_DAIFMT_CBM_CFM:
763 slave_mode = 1;
761 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
762 case SND_SOC_DAIFMT_CBP_CFP:
763 clock_provider = 1;
764 break;
764 break;
765 case SND_SOC_DAIFMT_CBS_CFS:
766 slave_mode = 0;
765 case SND_SOC_DAIFMT_CBC_CFC:
766 clock_provider = 0;
767 break;
768 default:
769 return -EINVAL;
770 }
771
772 regmap_update_bits(cs35l36->regmap, CS35L36_ASP_TX_PIN_CTRL,
773 CS35L36_SCLK_MSTR_MASK,
767 break;
768 default:
769 return -EINVAL;
770 }
771
772 regmap_update_bits(cs35l36->regmap, CS35L36_ASP_TX_PIN_CTRL,
773 CS35L36_SCLK_MSTR_MASK,
774 slave_mode << CS35L36_SCLK_MSTR_SHIFT);
774 clock_provider << CS35L36_SCLK_MSTR_SHIFT);
775 regmap_update_bits(cs35l36->regmap, CS35L36_ASP_RATE_CTRL,
776 CS35L36_LRCLK_MSTR_MASK,
775 regmap_update_bits(cs35l36->regmap, CS35L36_ASP_RATE_CTRL,
776 CS35L36_LRCLK_MSTR_MASK,
777 slave_mode << CS35L36_LRCLK_MSTR_SHIFT);
777 clock_provider << CS35L36_LRCLK_MSTR_SHIFT);
778
779 switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
780 case SND_SOC_DAIFMT_CONT:
781 clk_frc = 1;
782 break;
783 case SND_SOC_DAIFMT_GATED:
784 clk_frc = 0;
785 break;

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1151
1152 return 0;
1153}
1154
1155static int cs35l36_component_probe(struct snd_soc_component *component)
1156{
1157 struct cs35l36_private *cs35l36 =
1158 snd_soc_component_get_drvdata(component);
778
779 switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
780 case SND_SOC_DAIFMT_CONT:
781 clk_frc = 1;
782 break;
783 case SND_SOC_DAIFMT_GATED:
784 clk_frc = 0;
785 break;

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1151
1152 return 0;
1153}
1154
1155static int cs35l36_component_probe(struct snd_soc_component *component)
1156{
1157 struct cs35l36_private *cs35l36 =
1158 snd_soc_component_get_drvdata(component);
1159 int ret = 0;
1159 int ret;
1160
1161 if ((cs35l36->rev_id == CS35L36_REV_A0) && cs35l36->pdata.dcm_mode) {
1162 regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_DCM_CTRL,
1163 CS35L36_DCM_AUTO_MASK,
1164 CS35L36_DCM_AUTO_MASK);
1165
1166 regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL,
1167 CS35L36_TEST_UNLOCK1);

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1161 if ((cs35l36->rev_id == CS35L36_REV_A0) && cs35l36->pdata.dcm_mode) {
1162 regmap_update_bits(cs35l36->regmap, CS35L36_BSTCVRT_DCM_CTRL,
1163 CS35L36_DCM_AUTO_MASK,
1164 CS35L36_DCM_AUTO_MASK);
1165
1166 regmap_write(cs35l36->regmap, CS35L36_TESTKEY_CTRL,
1167 CS35L36_TEST_UNLOCK1);

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