ad193x.c (bc0a5f43d7d6ba5258a65cf00fa692845f128d3c) ad193x.c (8af6b2291e054773e2e58b2e5dbc06e981d14296)
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * AD193X Audio Codec driver supporting AD1936/7/8/9
4 *
5 * Copyright 2010 Analog Devices Inc.
6 */
7
8#include <linux/module.h>

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422
423/* codec register values to set after reset */
424static void ad193x_reg_default_init(struct ad193x_priv *ad193x)
425{
426 const struct ad193x_reg_default reg_init[] = {
427 { 0, 0x99 }, /* PLL_CLK_CTRL0: pll input: mclki/xi 12.288Mhz */
428 { 1, 0x04 }, /* PLL_CLK_CTRL1: no on-chip Vref */
429 { 2, 0x40 }, /* DAC_CTRL0: TDM mode */
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * AD193X Audio Codec driver supporting AD1936/7/8/9
4 *
5 * Copyright 2010 Analog Devices Inc.
6 */
7
8#include <linux/module.h>

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422
423/* codec register values to set after reset */
424static void ad193x_reg_default_init(struct ad193x_priv *ad193x)
425{
426 const struct ad193x_reg_default reg_init[] = {
427 { 0, 0x99 }, /* PLL_CLK_CTRL0: pll input: mclki/xi 12.288Mhz */
428 { 1, 0x04 }, /* PLL_CLK_CTRL1: no on-chip Vref */
429 { 2, 0x40 }, /* DAC_CTRL0: TDM mode */
430 { 3, 0x00 }, /* DAC_CTRL1: reset */
430 { 4, 0x1A }, /* DAC_CTRL2: 48kHz de-emphasis, unmute dac */
431 { 5, 0x00 }, /* DAC_CHNL_MUTE: unmute DAC channels */
431 { 4, 0x1A }, /* DAC_CTRL2: 48kHz de-emphasis, unmute dac */
432 { 5, 0x00 }, /* DAC_CHNL_MUTE: unmute DAC channels */
433 { 6, 0x00 }, /* DAC_L1_VOL: no attenuation */
434 { 7, 0x00 }, /* DAC_R1_VOL: no attenuation */
435 { 8, 0x00 }, /* DAC_L2_VOL: no attenuation */
436 { 9, 0x00 }, /* DAC_R2_VOL: no attenuation */
437 { 10, 0x00 }, /* DAC_L3_VOL: no attenuation */
438 { 11, 0x00 }, /* DAC_R3_VOL: no attenuation */
439 { 12, 0x00 }, /* DAC_L4_VOL: no attenuation */
440 { 13, 0x00 }, /* DAC_R4_VOL: no attenuation */
432 };
433 const struct ad193x_reg_default reg_adc_init[] = {
434 { 14, 0x03 }, /* ADC_CTRL0: high-pass filter enable */
435 { 15, 0x43 }, /* ADC_CTRL1: sata delay=1, adc aux mode */
441 };
442 const struct ad193x_reg_default reg_adc_init[] = {
443 { 14, 0x03 }, /* ADC_CTRL0: high-pass filter enable */
444 { 15, 0x43 }, /* ADC_CTRL1: sata delay=1, adc aux mode */
445 { 16, 0x00 }, /* ADC_CTRL2: reset */
436 };
437 int i;
438
439 for (i = 0; i < ARRAY_SIZE(reg_init); i++)
440 regmap_write(ad193x->regmap, reg_init[i].reg, reg_init[i].val);
441
442 if (ad193x_has_adc(ad193x)) {
443 for (i = 0; i < ARRAY_SIZE(reg_adc_init); i++) {

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447 int i;
448
449 for (i = 0; i < ARRAY_SIZE(reg_init); i++)
450 regmap_write(ad193x->regmap, reg_init[i].reg, reg_init[i].val);
451
452 if (ad193x_has_adc(ad193x)) {
453 for (i = 0; i < ARRAY_SIZE(reg_adc_init); i++) {

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