acp5x-mach.c (a719afe679b1c84413a70132a2de69c36b469144) acp5x-mach.c (9490fbb85be830b9f4078775d678426335e36a64)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Machine driver for AMD Vangogh platform using NAU8821 & CS35L41
4 * codecs.
5 *
6 * Copyright 2021 Advanced Micro Devices, Inc.
7 */
8

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114}
115
116static int acp5x_nau8821_hw_params(struct snd_pcm_substream *substream,
117 struct snd_pcm_hw_params *params)
118{
119 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
120 struct snd_soc_card *card = rtd->card;
121 struct snd_soc_dai *dai = snd_soc_card_get_codec_dai(card, ACP5X_NUVOTON_CODEC_DAI);
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Machine driver for AMD Vangogh platform using NAU8821 & CS35L41
4 * codecs.
5 *
6 * Copyright 2021 Advanced Micro Devices, Inc.
7 */
8

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114}
115
116static int acp5x_nau8821_hw_params(struct snd_pcm_substream *substream,
117 struct snd_pcm_hw_params *params)
118{
119 struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
120 struct snd_soc_card *card = rtd->card;
121 struct snd_soc_dai *dai = snd_soc_card_get_codec_dai(card, ACP5X_NUVOTON_CODEC_DAI);
122 int ret;
122 int ret, bclk;
123
124 ret = snd_soc_dai_set_sysclk(dai, NAU8821_CLK_FLL_BLK, 0, SND_SOC_CLOCK_IN);
125 if (ret < 0)
126 dev_err(card->dev, "can't set FS clock %d\n", ret);
123
124 ret = snd_soc_dai_set_sysclk(dai, NAU8821_CLK_FLL_BLK, 0, SND_SOC_CLOCK_IN);
125 if (ret < 0)
126 dev_err(card->dev, "can't set FS clock %d\n", ret);
127 ret = snd_soc_dai_set_pll(dai, 0, 0, snd_soc_params_to_bclk(params),
128 params_rate(params) * 256);
127
128 bclk = snd_soc_params_to_bclk(params);
129 if (bclk < 0) {
130 dev_err(dai->dev, "Fail to get BCLK rate: %d\n", bclk);
131 return bclk;
132 }
133
134 ret = snd_soc_dai_set_pll(dai, 0, 0, bclk, params_rate(params) * 256);
129 if (ret < 0)
130 dev_err(card->dev, "can't set FLL: %d\n", ret);
131
132 return ret;
133}
134
135static int acp5x_cs35l41_startup(struct snd_pcm_substream *substream)
136{

--- 243 unchanged lines hidden --- 		135 if (ret < 0)
136 dev_err(card->dev, "can't set FLL: %d\n", ret);
137
138 return ret;
139}
140
141static int acp5x_cs35l41_startup(struct snd_pcm_substream *substream)
142{

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