dai-intel.h (4b4193256c8d3bc3a5397b5cd9494c2ad386317d) dai-intel.h (68776b2fb06e7e438a2c4ebca5ca7f216e31d678)
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
7 */
8

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43/* mclk keep active */
44#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_KA BIT(2)
45/* bclk keep active */
46#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_KA BIT(3)
47/* fs keep active */
48#define SOF_DAI_INTEL_SSP_CLKCTRL_FS_KA BIT(4)
49/* bclk idle */
50#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_IDLE_HIGH BIT(5)
1/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
2/*
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
7 */
8

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43/* mclk keep active */
44#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_KA BIT(2)
45/* bclk keep active */
46#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_KA BIT(3)
47/* fs keep active */
48#define SOF_DAI_INTEL_SSP_CLKCTRL_FS_KA BIT(4)
49/* bclk idle */
50#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_IDLE_HIGH BIT(5)
51/* mclk early start */
52#define SOF_DAI_INTEL_SSP_CLKCTRL_MCLK_ES BIT(6)
53/* bclk early start */
54#define SOF_DAI_INTEL_SSP_CLKCTRL_BCLK_ES BIT(7)
51
52/* DMIC max. four controllers for eight microphone channels */
53#define SOF_DAI_INTEL_DMIC_NUM_CTRL 4
54
55/* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
56struct sof_ipc_dai_ssp_params {
57 struct sof_ipc_hdr hdr;
58 uint16_t reserved1;

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55
56/* DMIC max. four controllers for eight microphone channels */
57#define SOF_DAI_INTEL_DMIC_NUM_CTRL 4
58
59/* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
60struct sof_ipc_dai_ssp_params {
61 struct sof_ipc_hdr hdr;
62 uint16_t reserved1;

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