| mc.h (75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37) | mc.h (e34212c75a68990f7215d64d725c61e57ca70357) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2014 NVIDIA Corporation 4 */ 5 6#ifndef __SOC_TEGRA_MC_H__ 7#define __SOC_TEGRA_MC_H__ 8 --- 167 unchanged lines hidden (view full) --- 176 struct tegra_mc_timing *timings; 177 unsigned int num_timings; 178 179 struct reset_controller_dev reset; 180 181 spinlock_t lock; 182}; 183 | 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * Copyright (C) 2014 NVIDIA Corporation 4 */ 5 6#ifndef __SOC_TEGRA_MC_H__ 7#define __SOC_TEGRA_MC_H__ 8 --- 167 unchanged lines hidden (view full) --- 176 struct tegra_mc_timing *timings; 177 unsigned int num_timings; 178 179 struct reset_controller_dev reset; 180 181 spinlock_t lock; 182}; 183 |
| 184void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); | 184int tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); |
| 185unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc); 186 187#endif /* __SOC_TEGRA_MC_H__ */ | 185unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc); 186 187#endif /* __SOC_TEGRA_MC_H__ */ |