mc.h (1c74d5c0de0c2cc29fef97a19251da2ad6f579bd) mc.h (a8d502fd33484ed8c4acc6acae73918844ca6811)
1/*
2 * Copyright (C) 2014 NVIDIA Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8

--- 101 unchanged lines hidden (view full) ---

110 const struct tegra_smmu_soc *smmu;
111
112 u32 intmask;
113};
114
115struct tegra_mc {
116 struct device *dev;
117 struct tegra_smmu *smmu;
1/*
2 * Copyright (C) 2014 NVIDIA Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8

--- 101 unchanged lines hidden (view full) ---

110 const struct tegra_smmu_soc *smmu;
111
112 u32 intmask;
113};
114
115struct tegra_mc {
116 struct device *dev;
117 struct tegra_smmu *smmu;
118 void __iomem *regs;
118 void __iomem *regs, *regs2;
119 struct clk *clk;
120 int irq;
121
122 const struct tegra_mc_soc *soc;
123 unsigned long tick;
124
125 struct tegra_mc_timing *timings;
126 unsigned int num_timings;
127};
128
129void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
130unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
131
132#endif /* __SOC_TEGRA_MC_H__ */
119 struct clk *clk;
120 int irq;
121
122 const struct tegra_mc_soc *soc;
123 unsigned long tick;
124
125 struct tegra_mc_timing *timings;
126 unsigned int num_timings;
127};
128
129void tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate);
130unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc);
131
132#endif /* __SOC_TEGRA_MC_H__ */