ocelot.h (3007bc7321e3c37de9d7d965cb9fb95aaa00113b) ocelot.h (94aca0824443d32987b31e656044ff7da425c523)
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2/* Copyright (c) 2017 Microsemi Corporation
3 */
4
5#ifndef _SOC_MSCC_OCELOT_H
6#define _SOC_MSCC_OCELOT_H
7
8#include <linux/ptp_clock_kernel.h>

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380 S2_CACHE_MASK_DAT,
381 S2_CACHE_ACTION_DAT,
382 S2_CACHE_CNT_DAT,
383 S2_CACHE_TG_DAT,
384 PTP_PIN_CFG = PTP << TARGET_OFFSET,
385 PTP_PIN_TOD_SEC_MSB,
386 PTP_PIN_TOD_SEC_LSB,
387 PTP_PIN_TOD_NSEC,
1/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
2/* Copyright (c) 2017 Microsemi Corporation
3 */
4
5#ifndef _SOC_MSCC_OCELOT_H
6#define _SOC_MSCC_OCELOT_H
7
8#include <linux/ptp_clock_kernel.h>

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380 S2_CACHE_MASK_DAT,
381 S2_CACHE_ACTION_DAT,
382 S2_CACHE_CNT_DAT,
383 S2_CACHE_TG_DAT,
384 PTP_PIN_CFG = PTP << TARGET_OFFSET,
385 PTP_PIN_TOD_SEC_MSB,
386 PTP_PIN_TOD_SEC_LSB,
387 PTP_PIN_TOD_NSEC,
388 PTP_PIN_WF_HIGH_PERIOD,
389 PTP_PIN_WF_LOW_PERIOD,
388 PTP_CFG_MISC,
389 PTP_CLK_CFG_ADJ_CFG,
390 PTP_CLK_CFG_ADJ_FREQ,
391 GCB_SOFT_RST = GCB << TARGET_OFFSET,
392};
393
394enum ocelot_regfield {
395 ANA_ADVLEARN_VLAN_CHK,

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390 PTP_CFG_MISC,
391 PTP_CLK_CFG_ADJ_CFG,
392 PTP_CLK_CFG_ADJ_FREQ,
393 GCB_SOFT_RST = GCB << TARGET_OFFSET,
394};
395
396enum ocelot_regfield {
397 ANA_ADVLEARN_VLAN_CHK,

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