arm_vgic.h (eb5bc2a213f96bd43b5f00a625acb0c669613645) arm_vgic.h (662d9715840aef44dcb573b0f9fab9e8319c868a)
1/*
2 * Copyright (C) 2012 ARM Ltd.
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *

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143 struct kvm_exit_mmio *);
144 bool (*queue_sgi)(struct kvm_vcpu *, int irq);
145 void (*add_sgi_source)(struct kvm_vcpu *, int irq, int source);
146 int (*init_model)(struct kvm *);
147 int (*map_resources)(struct kvm *, const struct vgic_params *);
148};
149
150struct vgic_dist {
1/*
2 * Copyright (C) 2012 ARM Ltd.
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *

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143 struct kvm_exit_mmio *);
144 bool (*queue_sgi)(struct kvm_vcpu *, int irq);
145 void (*add_sgi_source)(struct kvm_vcpu *, int irq, int source);
146 int (*init_model)(struct kvm *);
147 int (*map_resources)(struct kvm *, const struct vgic_params *);
148};
149
150struct vgic_dist {
151#ifdef CONFIG_KVM_ARM_VGIC
152 spinlock_t lock;
153 bool in_kernel;
154 bool ready;
155
156 /* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */
157 u32 vgic_model;
158
159 int nr_cpus;

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232
233 /* Target MPIDR for each IRQ (needed for GICv3 IROUTERn) only */
234 u32 *irq_spi_mpidr;
235
236 /* Bitmap indicating which CPU has something pending */
237 unsigned long *irq_pending_on_cpu;
238
239 struct vgic_vm_ops vm_ops;
151 spinlock_t lock;
152 bool in_kernel;
153 bool ready;
154
155 /* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */
156 u32 vgic_model;
157
158 int nr_cpus;

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231
232 /* Target MPIDR for each IRQ (needed for GICv3 IROUTERn) only */
233 u32 *irq_spi_mpidr;
234
235 /* Bitmap indicating which CPU has something pending */
236 unsigned long *irq_pending_on_cpu;
237
238 struct vgic_vm_ops vm_ops;
240#endif
241};
242
243struct vgic_v2_cpu_if {
244 u32 vgic_hcr;
245 u32 vgic_vmcr;
246 u32 vgic_misr; /* Saved only */
247 u64 vgic_eisr; /* Saved only */
248 u64 vgic_elrsr; /* Saved only */

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260 u32 vgic_elrsr; /* Saved only */
261 u32 vgic_ap0r[4];
262 u32 vgic_ap1r[4];
263 u64 vgic_lr[VGIC_V3_MAX_LRS];
264#endif
265};
266
267struct vgic_cpu {
239};
240
241struct vgic_v2_cpu_if {
242 u32 vgic_hcr;
243 u32 vgic_vmcr;
244 u32 vgic_misr; /* Saved only */
245 u64 vgic_eisr; /* Saved only */
246 u64 vgic_elrsr; /* Saved only */

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258 u32 vgic_elrsr; /* Saved only */
259 u32 vgic_ap0r[4];
260 u32 vgic_ap1r[4];
261 u64 vgic_lr[VGIC_V3_MAX_LRS];
262#endif
263};
264
265struct vgic_cpu {
268#ifdef CONFIG_KVM_ARM_VGIC
269 /* per IRQ to LR mapping */
270 u8 *vgic_irq_lr_map;
271
272 /* Pending interrupts on this VCPU */
273 DECLARE_BITMAP( pending_percpu, VGIC_NR_PRIVATE_IRQS);
274 unsigned long *pending_shared;
275
276 /* Bitmap of used/free list registers */
277 DECLARE_BITMAP( lr_used, VGIC_V2_MAX_LRS);
278
279 /* Number of list registers on this CPU */
280 int nr_lr;
281
282 /* CPU vif control registers for world switch */
283 union {
284 struct vgic_v2_cpu_if vgic_v2;
285 struct vgic_v3_cpu_if vgic_v3;
286 };
266 /* per IRQ to LR mapping */
267 u8 *vgic_irq_lr_map;
268
269 /* Pending interrupts on this VCPU */
270 DECLARE_BITMAP( pending_percpu, VGIC_NR_PRIVATE_IRQS);
271 unsigned long *pending_shared;
272
273 /* Bitmap of used/free list registers */
274 DECLARE_BITMAP( lr_used, VGIC_V2_MAX_LRS);
275
276 /* Number of list registers on this CPU */
277 int nr_lr;
278
279 /* CPU vif control registers for world switch */
280 union {
281 struct vgic_v2_cpu_if vgic_v2;
282 struct vgic_v3_cpu_if vgic_v3;
283 };
287#endif
288};
289
290#define LR_EMPTY 0xff
291
292#define INT_STATUS_EOI (1 << 0)
293#define INT_STATUS_UNDERFLOW (1 << 1)
294
295struct kvm;
296struct kvm_vcpu;
297struct kvm_run;
298struct kvm_exit_mmio;
299
284};
285
286#define LR_EMPTY 0xff
287
288#define INT_STATUS_EOI (1 << 0)
289#define INT_STATUS_UNDERFLOW (1 << 1)
290
291struct kvm;
292struct kvm_vcpu;
293struct kvm_run;
294struct kvm_exit_mmio;
295
300#ifdef CONFIG_KVM_ARM_VGIC
301int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
302int kvm_vgic_hyp_init(void);
303int kvm_vgic_map_resources(struct kvm *kvm);
304int kvm_vgic_get_max_vcpus(void);
305int kvm_vgic_create(struct kvm *kvm, u32 type);
306void kvm_vgic_destroy(struct kvm *kvm);
307void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu);
308void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);

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329static inline int vgic_v3_probe(struct device_node *vgic_node,
330 const struct vgic_ops **ops,
331 const struct vgic_params **params)
332{
333 return -ENODEV;
334}
335#endif
336
296int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write);
297int kvm_vgic_hyp_init(void);
298int kvm_vgic_map_resources(struct kvm *kvm);
299int kvm_vgic_get_max_vcpus(void);
300int kvm_vgic_create(struct kvm *kvm, u32 type);
301void kvm_vgic_destroy(struct kvm *kvm);
302void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu);
303void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu);

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324static inline int vgic_v3_probe(struct device_node *vgic_node,
325 const struct vgic_ops **ops,
326 const struct vgic_params **params)
327{
328 return -ENODEV;
329}
330#endif
331
337#else
338static inline int kvm_vgic_hyp_init(void)
339{
340 return 0;
341}
342
343static inline int kvm_vgic_set_addr(struct kvm *kvm, unsigned long type, u64 addr)
344{
345 return 0;
346}
347
348static inline int kvm_vgic_addr(struct kvm *kvm, unsigned long type, u64 *addr, bool write)
349{
350 return -ENXIO;
351}
352
353static inline int kvm_vgic_map_resources(struct kvm *kvm)
354{
355 return 0;
356}
357
358static inline int kvm_vgic_create(struct kvm *kvm, u32 type)
359{
360 return 0;
361}
362
363static inline void kvm_vgic_destroy(struct kvm *kvm)
364{
365}
366
367static inline void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
368{
369}
370
371static inline int kvm_vgic_vcpu_init(struct kvm_vcpu *vcpu)
372{
373 return 0;
374}
375
376static inline void kvm_vgic_flush_hwstate(struct kvm_vcpu *vcpu) {}
377static inline void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) {}
378
379static inline int kvm_vgic_inject_irq(struct kvm *kvm, int cpuid,
380 unsigned int irq_num, bool level)
381{
382 return 0;
383}
384
385static inline int kvm_vgic_vcpu_pending_irq(struct kvm_vcpu *vcpu)
386{
387 return 0;
388}
389
390static inline bool vgic_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
391 struct kvm_exit_mmio *mmio)
392{
393 return false;
394}
395
396static inline int irqchip_in_kernel(struct kvm *kvm)
397{
398 return 0;
399}
400
401static inline bool vgic_initialized(struct kvm *kvm)
402{
403 return true;
404}
405
406static inline bool vgic_ready(struct kvm *kvm)
407{
408 return true;
409}
410
411static inline int kvm_vgic_get_max_vcpus(void)
412{
413 return KVM_MAX_VCPUS;
414}
415#endif
332#endif
416
417#endif