| exynos5420.h (faec151b5006f832c8cefc76d01893496445a7ec) | exynos5420.h (0a22c3065333d3138475ff1d25851633e8dae722) |
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| 1/* 2 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 3 * Author: Andrzej Haja <a.hajda@samsung.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * --- 139 unchanged lines hidden (view full) --- 148#define CLK_ROTATOR 441 149#define CLK_MDMA1 442 150#define CLK_SMMU_ROTATOR 443 151#define CLK_SMMU_MDMA1 444 152#define CLK_ACLK300_JPEG 450 153#define CLK_JPEG 451 154#define CLK_JPEG2 452 155#define CLK_SMMU_JPEG 453 | 1/* 2 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 3 * Author: Andrzej Haja <a.hajda@samsung.com> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 * --- 139 unchanged lines hidden (view full) --- 148#define CLK_ROTATOR 441 149#define CLK_MDMA1 442 150#define CLK_SMMU_ROTATOR 443 151#define CLK_SMMU_MDMA1 444 152#define CLK_ACLK300_JPEG 450 153#define CLK_JPEG 451 154#define CLK_JPEG2 452 155#define CLK_SMMU_JPEG 453 |
| 156#define CLK_SMMU_JPEG2 454 |
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| 156#define CLK_ACLK300_GSCL 460 157#define CLK_SMMU_GSCL0 461 158#define CLK_SMMU_GSCL1 462 159#define CLK_GSCL_WA 463 160#define CLK_GSCL_WB 464 161#define CLK_GSCL0 465 162#define CLK_GSCL1 466 163#define CLK_FIMC_3AA 467 --- 11 unchanged lines hidden (view full) --- 175#define CLK_FIMC_LITE3 495 176#define CLK_FIMC_LITE0 496 177#define CLK_FIMC_LITE1 497 178#define CLK_ACLK_G3D 500 179#define CLK_G3D 501 180#define CLK_SMMU_MIXER 502 181#define CLK_SMMU_G2D 503 182#define CLK_SMMU_MDMA0 504 | 157#define CLK_ACLK300_GSCL 460 158#define CLK_SMMU_GSCL0 461 159#define CLK_SMMU_GSCL1 462 160#define CLK_GSCL_WA 463 161#define CLK_GSCL_WB 464 162#define CLK_GSCL0 465 163#define CLK_GSCL1 466 164#define CLK_FIMC_3AA 467 --- 11 unchanged lines hidden (view full) --- 176#define CLK_FIMC_LITE3 495 177#define CLK_FIMC_LITE0 496 178#define CLK_FIMC_LITE1 497 179#define CLK_ACLK_G3D 500 180#define CLK_G3D 501 181#define CLK_SMMU_MIXER 502 182#define CLK_SMMU_G2D 503 183#define CLK_SMMU_MDMA0 504 |
| 184#define CLK_MC 505 185#define CLK_TOP_RTC 506 |
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| 183#define CLK_SCLK_UART_ISP 510 184#define CLK_SCLK_SPI0_ISP 511 185#define CLK_SCLK_SPI1_ISP 512 186#define CLK_SCLK_PWM_ISP 513 187#define CLK_SCLK_ISP_SENSOR0 514 188#define CLK_SCLK_ISP_SENSOR1 515 189#define CLK_SCLK_ISP_SENSOR2 516 190 --- 12 unchanged lines hidden --- | 186#define CLK_SCLK_UART_ISP 510 187#define CLK_SCLK_SPI0_ISP 511 188#define CLK_SCLK_SPI1_ISP 512 189#define CLK_SCLK_PWM_ISP 513 190#define CLK_SCLK_ISP_SENSOR0 514 191#define CLK_SCLK_ISP_SENSOR1 515 192#define CLK_SCLK_ISP_SENSOR2 516 193 --- 12 unchanged lines hidden --- |