| barrier.h (3e79f082ebfc130360bcee23e4dd74729dcafdf4) | barrier.h (e506ea451254ab17e0bf918ca36232fec2a9b10c) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Generic barrier definitions. 4 * 5 * It should be possible to use these on really simple architectures, 6 * but it serves more as a starting point for new ports. 7 * 8 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 9 * Written by David Howells (dhowells@redhat.com) 10 */ 11#ifndef __ASM_GENERIC_BARRIER_H 12#define __ASM_GENERIC_BARRIER_H 13 14#ifndef __ASSEMBLY__ 15 | 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Generic barrier definitions. 4 * 5 * It should be possible to use these on really simple architectures, 6 * but it serves more as a starting point for new ports. 7 * 8 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 9 * Written by David Howells (dhowells@redhat.com) 10 */ 11#ifndef __ASM_GENERIC_BARRIER_H 12#define __ASM_GENERIC_BARRIER_H 13 14#ifndef __ASSEMBLY__ 15 |
| 16#include <linux/compiler.h> | 16#include <asm/rwonce.h> |
| 17 18#ifndef nop 19#define nop() asm volatile ("nop") 20#endif 21 22/* 23 * Force strict CPU ordering. And yes, this is required on UP too when we're 24 * talking to devices. --- 227 unchanged lines hidden (view full) --- 252#define smp_cond_load_acquire(ptr, cond_expr) ({ \ 253 __unqual_scalar_typeof(*ptr) _val; \ 254 _val = smp_cond_load_relaxed(ptr, cond_expr); \ 255 smp_acquire__after_ctrl_dep(); \ 256 (typeof(*ptr))_val; \ 257}) 258#endif 259 | 17 18#ifndef nop 19#define nop() asm volatile ("nop") 20#endif 21 22/* 23 * Force strict CPU ordering. And yes, this is required on UP too when we're 24 * talking to devices. --- 227 unchanged lines hidden (view full) --- 252#define smp_cond_load_acquire(ptr, cond_expr) ({ \ 253 __unqual_scalar_typeof(*ptr) _val; \ 254 _val = smp_cond_load_relaxed(ptr, cond_expr); \ 255 smp_acquire__after_ctrl_dep(); \ 256 (typeof(*ptr))_val; \ 257}) 258#endif 259 |
| 260/* 261 * pmem_wmb() ensures that all stores for which the modification 262 * are written to persistent storage by preceding instructions have 263 * updated persistent storage before any data access or data transfer 264 * caused by subsequent instructions is initiated. 265 */ 266#ifndef pmem_wmb 267#define pmem_wmb() wmb() 268#endif 269 | |
| 270#endif /* !__ASSEMBLY__ */ 271#endif /* __ASM_GENERIC_BARRIER_H */ | 260#endif /* !__ASSEMBLY__ */ 261#endif /* __ASM_GENERIC_BARRIER_H */ |