gxt4500.c (3c083aa9d2a7b8904c6bd68628c7dfdf9d413816) gxt4500.c (38fc4d45fae58d81786acfe81a13ec0c93b01c98)
1/*
2 * Frame buffer device for IBM GXT4500P/6500P and GXT4000P/6000P
3 * display adaptors
4 *
5 * Copyright (C) 2006 Paul Mackerras, IBM Corp. <paulus@samba.org>
6 */
7
8#include <linux/kernel.h>

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137/* Colormap array; 1k entries of 4 bytes each */
138#define CMAP 0x6000
139
140#define readreg(par, reg) readl((par)->regs + (reg))
141#define writereg(par, reg, val) writel((val), (par)->regs + (reg))
142
143struct gxt4500_par {
144 void __iomem *regs;
1/*
2 * Frame buffer device for IBM GXT4500P/6500P and GXT4000P/6000P
3 * display adaptors
4 *
5 * Copyright (C) 2006 Paul Mackerras, IBM Corp. <paulus@samba.org>
6 */
7
8#include <linux/kernel.h>

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137/* Colormap array; 1k entries of 4 bytes each */
138#define CMAP 0x6000
139
140#define readreg(par, reg) readl((par)->regs + (reg))
141#define writereg(par, reg, val) writel((val), (par)->regs + (reg))
142
143struct gxt4500_par {
144 void __iomem *regs;
145
145 int wc_cookie;
146 int pixfmt; /* pixel format, see DFA_PIX_* values */
147
148 /* PLL parameters */
149 int refclk_ps; /* ref clock period in picoseconds */
150 int pll_m; /* ref clock divisor */
151 int pll_n; /* VCO divisor */
152 int pll_pd1; /* first post-divisor */
153 int pll_pd2; /* second post-divisor */

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666 info->screen_base = pci_ioremap_wc_bar(pdev, 1);
667 if (!info->screen_base) {
668 dev_err(&pdev->dev, "gxt4500: cannot map framebuffer\n");
669 goto err_unmap_regs;
670 }
671
672 pci_set_drvdata(pdev, info);
673
146 int pixfmt; /* pixel format, see DFA_PIX_* values */
147
148 /* PLL parameters */
149 int refclk_ps; /* ref clock period in picoseconds */
150 int pll_m; /* ref clock divisor */
151 int pll_n; /* VCO divisor */
152 int pll_pd1; /* first post-divisor */
153 int pll_pd2; /* second post-divisor */

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666 info->screen_base = pci_ioremap_wc_bar(pdev, 1);
667 if (!info->screen_base) {
668 dev_err(&pdev->dev, "gxt4500: cannot map framebuffer\n");
669 goto err_unmap_regs;
670 }
671
672 pci_set_drvdata(pdev, info);
673
674 par->wc_cookie = arch_phys_wc_add(info->fix.smem_start,
675 info->fix.smem_len);
676
674#ifdef __BIG_ENDIAN
675 /* Set byte-swapping for DFA aperture for all pixel sizes */
676 pci_write_config_dword(pdev, CFG_ENDIAN0, 0x333300);
677#else /* __LITTLE_ENDIAN */
678 /* not sure what this means but fgl23 driver does that */
679 pci_write_config_dword(pdev, CFG_ENDIAN0, 0x2300);
680/* pci_write_config_dword(pdev, CFG_ENDIAN0 + 4, 0x400000);*/
681 pci_write_config_dword(pdev, CFG_ENDIAN0 + 8, 0x98530000);

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730{
731 struct fb_info *info = pci_get_drvdata(pdev);
732 struct gxt4500_par *par;
733
734 if (!info)
735 return;
736 par = info->par;
737 unregister_framebuffer(info);
677#ifdef __BIG_ENDIAN
678 /* Set byte-swapping for DFA aperture for all pixel sizes */
679 pci_write_config_dword(pdev, CFG_ENDIAN0, 0x333300);
680#else /* __LITTLE_ENDIAN */
681 /* not sure what this means but fgl23 driver does that */
682 pci_write_config_dword(pdev, CFG_ENDIAN0, 0x2300);
683/* pci_write_config_dword(pdev, CFG_ENDIAN0 + 4, 0x400000);*/
684 pci_write_config_dword(pdev, CFG_ENDIAN0 + 8, 0x98530000);

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733{
734 struct fb_info *info = pci_get_drvdata(pdev);
735 struct gxt4500_par *par;
736
737 if (!info)
738 return;
739 par = info->par;
740 unregister_framebuffer(info);
741 arch_phys_wc_del(par->wc_cookie);
738 fb_dealloc_cmap(&info->cmap);
739 iounmap(par->regs);
740 iounmap(info->screen_base);
741 release_mem_region(pci_resource_start(pdev, 0),
742 pci_resource_len(pdev, 0));
743 release_mem_region(pci_resource_start(pdev, 1),
744 pci_resource_len(pdev, 1));
745 framebuffer_release(info);

--- 46 unchanged lines hidden --- 		742 fb_dealloc_cmap(&info->cmap);
743 iounmap(par->regs);
744 iounmap(info->screen_base);
745 release_mem_region(pci_resource_start(pdev, 0),
746 pci_resource_len(pdev, 0));
747 release_mem_region(pci_resource_start(pdev, 1),
748 pci_resource_len(pdev, 1));
749 framebuffer_release(info);

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