cp210x.c (a49e1abf07701600ad5ef990e56d676cbab91bf5) cp210x.c (15fb84b741966c8a08e02e145ec5932d51b6c4ad)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Silicon Laboratories CP210x USB to RS232 serial adaptor driver
4 *
5 * Copyright (C) 2005 Craig Shelley (craig@microtron.org.uk)
6 *
7 * Support to set flow control line levels using TIOCMGET and TIOCMSET
8 * thanks to Karl Hiramoto karl@hiramoto.org. RTSCTS hardware flow

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438 u8 eci;
439 u8 sci;
440} __packed;
441
442#define CP210X_PIN_MODE_MODEM 0
443#define CP210X_PIN_MODE_GPIO BIT(0)
444
445/*
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Silicon Laboratories CP210x USB to RS232 serial adaptor driver
4 *
5 * Copyright (C) 2005 Craig Shelley (craig@microtron.org.uk)
6 *
7 * Support to set flow control line levels using TIOCMGET and TIOCMSET
8 * thanks to Karl Hiramoto karl@hiramoto.org. RTSCTS hardware flow

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438 u8 eci;
439 u8 sci;
440} __packed;
441
442#define CP210X_PIN_MODE_MODEM 0
443#define CP210X_PIN_MODE_GPIO BIT(0)
444
445/*
446 * CP210X_VENDOR_SPECIFIC, CP210X_GET_PORTCONFIG call reads these 0xf bytes.
447 * Structure needs padding due to unused/unspecified bytes.
446 * CP210X_VENDOR_SPECIFIC, CP210X_GET_PORTCONFIG call reads these 0xf bytes
447 * on a CP2105 chip. Structure needs padding due to unused/unspecified bytes.
448 */
448 */
449struct cp210x_config {
449struct cp210x_dual_port_config {
450 __le16 gpio_mode;
451 u8 __pad0[2];
452 __le16 reset_state;
453 u8 __pad1[4];
454 __le16 suspend_state;
455 u8 sci_cfg;
456 u8 eci_cfg;
457 u8 device_cfg;
458} __packed;
459
450 __le16 gpio_mode;
451 u8 __pad0[2];
452 __le16 reset_state;
453 u8 __pad1[4];
454 __le16 suspend_state;
455 u8 sci_cfg;
456 u8 eci_cfg;
457 u8 device_cfg;
458} __packed;
459
460/*
461 * CP210X_VENDOR_SPECIFIC, CP210X_GET_PORTCONFIG call reads these 0xd bytes
462 * on a CP2104 chip. Structure needs padding due to unused/unspecified bytes.
463 */
464struct cp210x_single_port_config {
465 __le16 gpio_mode;
466 u8 __pad0[2];
467 __le16 reset_state;
468 u8 __pad1[4];
469 __le16 suspend_state;
470 u8 device_cfg;
471} __packed;
472
460/* GPIO modes */
461#define CP210X_SCI_GPIO_MODE_OFFSET 9
462#define CP210X_SCI_GPIO_MODE_MASK GENMASK(11, 9)
463
464#define CP210X_ECI_GPIO_MODE_OFFSET 2
465#define CP210X_ECI_GPIO_MODE_MASK GENMASK(3, 2)
466
473/* GPIO modes */
474#define CP210X_SCI_GPIO_MODE_OFFSET 9
475#define CP210X_SCI_GPIO_MODE_MASK GENMASK(11, 9)
476
477#define CP210X_ECI_GPIO_MODE_OFFSET 2
478#define CP210X_ECI_GPIO_MODE_MASK GENMASK(3, 2)
479
480#define CP210X_GPIO_MODE_OFFSET 8
481#define CP210X_GPIO_MODE_MASK GENMASK(11, 8)
482
467/* CP2105 port configuration values */
468#define CP2105_GPIO0_TXLED_MODE BIT(0)
469#define CP2105_GPIO1_RXLED_MODE BIT(1)
470#define CP2105_GPIO1_RS485_MODE BIT(2)
471
483/* CP2105 port configuration values */
484#define CP2105_GPIO0_TXLED_MODE BIT(0)
485#define CP2105_GPIO1_RXLED_MODE BIT(1)
486#define CP2105_GPIO1_RS485_MODE BIT(2)
487
488/* CP2104 port configuration values */
489#define CP2104_GPIO0_TXLED_MODE BIT(0)
490#define CP2104_GPIO1_RXLED_MODE BIT(1)
491#define CP2104_GPIO2_RS485_MODE BIT(2)
492
472/* CP2102N configuration array indices */
473#define CP210X_2NCONFIG_CONFIG_VERSION_IDX 2
474#define CP210X_2NCONFIG_GPIO_MODE_IDX 581
475#define CP210X_2NCONFIG_GPIO_RSTLATCH_IDX 587
476#define CP210X_2NCONFIG_GPIO_CONTROL_IDX 600
477
478/* CP210X_VENDOR_SPECIFIC, CP210X_WRITE_LATCH call writes these 0x2 bytes. */
479struct cp210x_gpio_write {

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1465 * only applicable to the cp2105 at this point, the other devices supported by
1466 * this driver that provide GPIO do so in a way that does not impact other
1467 * signals and are thus expected to have very different initialisation.
1468 */
1469static int cp2105_gpioconf_init(struct usb_serial *serial)
1470{
1471 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1472 struct cp210x_pin_mode mode;
493/* CP2102N configuration array indices */
494#define CP210X_2NCONFIG_CONFIG_VERSION_IDX 2
495#define CP210X_2NCONFIG_GPIO_MODE_IDX 581
496#define CP210X_2NCONFIG_GPIO_RSTLATCH_IDX 587
497#define CP210X_2NCONFIG_GPIO_CONTROL_IDX 600
498
499/* CP210X_VENDOR_SPECIFIC, CP210X_WRITE_LATCH call writes these 0x2 bytes. */
500struct cp210x_gpio_write {

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1486 * only applicable to the cp2105 at this point, the other devices supported by
1487 * this driver that provide GPIO do so in a way that does not impact other
1488 * signals and are thus expected to have very different initialisation.
1489 */
1490static int cp2105_gpioconf_init(struct usb_serial *serial)
1491{
1492 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1493 struct cp210x_pin_mode mode;
1473 struct cp210x_config config;
1494 struct cp210x_dual_port_config config;
1474 u8 intf_num = cp210x_interface_num(serial);
1475 u8 iface_config;
1476 int result;
1477
1478 result = cp210x_read_vendor_block(serial, REQTYPE_DEVICE_TO_HOST,
1479 CP210X_GET_DEVICEMODE, &mode,
1480 sizeof(mode));
1481 if (result < 0)

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1524 priv->gpio_altfunc |= BIT(1);
1525
1526 /* driver implementation for CP2105 only supports outputs */
1527 priv->gpio_input = 0;
1528
1529 return 0;
1530}
1531
1495 u8 intf_num = cp210x_interface_num(serial);
1496 u8 iface_config;
1497 int result;
1498
1499 result = cp210x_read_vendor_block(serial, REQTYPE_DEVICE_TO_HOST,
1500 CP210X_GET_DEVICEMODE, &mode,
1501 sizeof(mode));
1502 if (result < 0)

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1545 priv->gpio_altfunc |= BIT(1);
1546
1547 /* driver implementation for CP2105 only supports outputs */
1548 priv->gpio_input = 0;
1549
1550 return 0;
1551}
1552
1553static int cp2104_gpioconf_init(struct usb_serial *serial)
1554{
1555 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1556 struct cp210x_single_port_config config;
1557 u8 iface_config;
1558 u8 gpio_latch;
1559 int result;
1560 u8 i;
1561
1562 result = cp210x_read_vendor_block(serial, REQTYPE_DEVICE_TO_HOST,
1563 CP210X_GET_PORTCONFIG, &config,
1564 sizeof(config));
1565 if (result < 0)
1566 return result;
1567
1568 priv->gc.ngpio = 4;
1569
1570 iface_config = config.device_cfg;
1571 priv->gpio_pushpull = (u8)((le16_to_cpu(config.gpio_mode) &
1572 CP210X_GPIO_MODE_MASK) >>
1573 CP210X_GPIO_MODE_OFFSET);
1574 gpio_latch = (u8)((le16_to_cpu(config.reset_state) &
1575 CP210X_GPIO_MODE_MASK) >>
1576 CP210X_GPIO_MODE_OFFSET);
1577
1578 /* mark all pins which are not in GPIO mode */
1579 if (iface_config & CP2104_GPIO0_TXLED_MODE) /* GPIO 0 */
1580 priv->gpio_altfunc |= BIT(0);
1581 if (iface_config & CP2104_GPIO1_RXLED_MODE) /* GPIO 1 */
1582 priv->gpio_altfunc |= BIT(1);
1583 if (iface_config & CP2104_GPIO2_RS485_MODE) /* GPIO 2 */
1584 priv->gpio_altfunc |= BIT(2);
1585
1586 /*
1587 * Like CP2102N, CP2104 has also no strict input and output pin
1588 * modes.
1589 * Do the same input mode emulation as CP2102N.
1590 */
1591 for (i = 0; i < priv->gc.ngpio; ++i) {
1592 /*
1593 * Set direction to "input" iff pin is open-drain and reset
1594 * value is 1.
1595 */
1596 if (!(priv->gpio_pushpull & BIT(i)) && (gpio_latch & BIT(i)))
1597 priv->gpio_input |= BIT(i);
1598 }
1599
1600 return 0;
1601}
1602
1532static int cp2102n_gpioconf_init(struct usb_serial *serial)
1533{
1534 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1535 const u16 config_size = 0x02a6;
1536 u8 gpio_rst_latch;
1537 u8 config_version;
1538 u8 gpio_pushpull;
1539 u8 *config_buf;

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1622}
1623
1624static int cp210x_gpio_init(struct usb_serial *serial)
1625{
1626 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1627 int result;
1628
1629 switch (priv->partnum) {
1603static int cp2102n_gpioconf_init(struct usb_serial *serial)
1604{
1605 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1606 const u16 config_size = 0x02a6;
1607 u8 gpio_rst_latch;
1608 u8 config_version;
1609 u8 gpio_pushpull;
1610 u8 *config_buf;

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1693}
1694
1695static int cp210x_gpio_init(struct usb_serial *serial)
1696{
1697 struct cp210x_serial_private *priv = usb_get_serial_data(serial);
1698 int result;
1699
1700 switch (priv->partnum) {
1701 case CP210X_PARTNUM_CP2104:
1702 result = cp2104_gpioconf_init(serial);
1703 break;
1630 case CP210X_PARTNUM_CP2105:
1631 result = cp2105_gpioconf_init(serial);
1632 break;
1633 case CP210X_PARTNUM_CP2102N_QFN28:
1634 case CP210X_PARTNUM_CP2102N_QFN24:
1635 case CP210X_PARTNUM_CP2102N_QFN20:
1636 result = cp2102n_gpioconf_init(serial);
1637 break;

--- 177 unchanged lines hidden --- 		1704 case CP210X_PARTNUM_CP2105:
1705 result = cp2105_gpioconf_init(serial);
1706 break;
1707 case CP210X_PARTNUM_CP2102N_QFN28:
1708 case CP210X_PARTNUM_CP2102N_QFN24:
1709 case CP210X_PARTNUM_CP2102N_QFN20:
1710 result = cp2102n_gpioconf_init(serial);
1711 break;

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