cp210x.c (8cce3bbfb4cffce097c823c29ba487d5a7422d37) cp210x.c (568400b15a5145cb5d1479ece14e7b6d3a3cb554)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Silicon Laboratories CP210x USB to RS232 serial adaptor driver
4 *
5 * Copyright (C) 2005 Craig Shelley (craig@microtron.org.uk)
6 * Copyright (C) 2010-2021 Johan Hovold (johan@kernel.org)
7 *
8 * Support to set flow control line levels using TIOCMGET and TIOCMSET

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444 __le32 ulControlHandshake;
445 __le32 ulFlowReplace;
446 __le32 ulXonLimit;
447 __le32 ulXoffLimit;
448};
449
450/* cp210x_flow_ctl::ulControlHandshake */
451#define CP210X_SERIAL_DTR_MASK GENMASK(1, 0)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Silicon Laboratories CP210x USB to RS232 serial adaptor driver
4 *
5 * Copyright (C) 2005 Craig Shelley (craig@microtron.org.uk)
6 * Copyright (C) 2010-2021 Johan Hovold (johan@kernel.org)
7 *
8 * Support to set flow control line levels using TIOCMGET and TIOCMSET

--- 435 unchanged lines hidden (view full) ---

444 __le32 ulControlHandshake;
445 __le32 ulFlowReplace;
446 __le32 ulXonLimit;
447 __le32 ulXoffLimit;
448};
449
450/* cp210x_flow_ctl::ulControlHandshake */
451#define CP210X_SERIAL_DTR_MASK GENMASK(1, 0)
452#define CP210X_SERIAL_DTR_SHIFT(_mode) (_mode)
452#define CP210X_SERIAL_DTR_INACTIVE (0 << 0)
453#define CP210X_SERIAL_DTR_ACTIVE (1 << 0)
454#define CP210X_SERIAL_DTR_FLOW_CTL (2 << 0)
453#define CP210X_SERIAL_CTS_HANDSHAKE BIT(3)
454#define CP210X_SERIAL_DSR_HANDSHAKE BIT(4)
455#define CP210X_SERIAL_DCD_HANDSHAKE BIT(5)
456#define CP210X_SERIAL_DSR_SENSITIVITY BIT(6)
457
455#define CP210X_SERIAL_CTS_HANDSHAKE BIT(3)
456#define CP210X_SERIAL_DSR_HANDSHAKE BIT(4)
457#define CP210X_SERIAL_DCD_HANDSHAKE BIT(5)
458#define CP210X_SERIAL_DSR_SENSITIVITY BIT(6)
459
458/* values for cp210x_flow_ctl::ulControlHandshake::CP210X_SERIAL_DTR_MASK */
459#define CP210X_SERIAL_DTR_INACTIVE 0
460#define CP210X_SERIAL_DTR_ACTIVE 1
461#define CP210X_SERIAL_DTR_FLOW_CTL 2
462
463/* cp210x_flow_ctl::ulFlowReplace */
464#define CP210X_SERIAL_AUTO_TRANSMIT BIT(0)
465#define CP210X_SERIAL_AUTO_RECEIVE BIT(1)
466#define CP210X_SERIAL_ERROR_CHAR BIT(2)
467#define CP210X_SERIAL_NULL_STRIPPING BIT(3)
468#define CP210X_SERIAL_BREAK_CHAR BIT(4)
469#define CP210X_SERIAL_RTS_MASK GENMASK(7, 6)
460/* cp210x_flow_ctl::ulFlowReplace */
461#define CP210X_SERIAL_AUTO_TRANSMIT BIT(0)
462#define CP210X_SERIAL_AUTO_RECEIVE BIT(1)
463#define CP210X_SERIAL_ERROR_CHAR BIT(2)
464#define CP210X_SERIAL_NULL_STRIPPING BIT(3)
465#define CP210X_SERIAL_BREAK_CHAR BIT(4)
466#define CP210X_SERIAL_RTS_MASK GENMASK(7, 6)
470#define CP210X_SERIAL_RTS_SHIFT(_mode) (_mode << 6)
467#define CP210X_SERIAL_RTS_INACTIVE (0 << 6)
468#define CP210X_SERIAL_RTS_ACTIVE (1 << 6)
469#define CP210X_SERIAL_RTS_FLOW_CTL (2 << 6)
471#define CP210X_SERIAL_XOFF_CONTINUE BIT(31)
472
470#define CP210X_SERIAL_XOFF_CONTINUE BIT(31)
471
473/* values for cp210x_flow_ctl::ulFlowReplace::CP210X_SERIAL_RTS_MASK */
474#define CP210X_SERIAL_RTS_INACTIVE 0
475#define CP210X_SERIAL_RTS_ACTIVE 1
476#define CP210X_SERIAL_RTS_FLOW_CTL 2
477
478/* CP210X_VENDOR_SPECIFIC, CP210X_GET_DEVICEMODE call reads these 0x2 bytes. */
479struct cp210x_pin_mode {
480 u8 eci;
481 u8 sci;
482};
483
484#define CP210X_PIN_MODE_MODEM 0
485#define CP210X_PIN_MODE_GPIO BIT(0)

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1160 ctl_hs = le32_to_cpu(flow_ctl.ulControlHandshake);
1161 flow_repl = le32_to_cpu(flow_ctl.ulFlowReplace);
1162
1163 ctl_hs &= ~CP210X_SERIAL_DSR_HANDSHAKE;
1164 ctl_hs &= ~CP210X_SERIAL_DCD_HANDSHAKE;
1165 ctl_hs &= ~CP210X_SERIAL_DSR_SENSITIVITY;
1166 ctl_hs &= ~CP210X_SERIAL_DTR_MASK;
1167 if (port_priv->dtr)
472/* CP210X_VENDOR_SPECIFIC, CP210X_GET_DEVICEMODE call reads these 0x2 bytes. */
473struct cp210x_pin_mode {
474 u8 eci;
475 u8 sci;
476};
477
478#define CP210X_PIN_MODE_MODEM 0
479#define CP210X_PIN_MODE_GPIO BIT(0)

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1154 ctl_hs = le32_to_cpu(flow_ctl.ulControlHandshake);
1155 flow_repl = le32_to_cpu(flow_ctl.ulFlowReplace);
1156
1157 ctl_hs &= ~CP210X_SERIAL_DSR_HANDSHAKE;
1158 ctl_hs &= ~CP210X_SERIAL_DCD_HANDSHAKE;
1159 ctl_hs &= ~CP210X_SERIAL_DSR_SENSITIVITY;
1160 ctl_hs &= ~CP210X_SERIAL_DTR_MASK;
1161 if (port_priv->dtr)
1168 ctl_hs |= CP210X_SERIAL_DTR_SHIFT(CP210X_SERIAL_DTR_ACTIVE);
1162 ctl_hs |= CP210X_SERIAL_DTR_ACTIVE;
1169 else
1163 else
1170 ctl_hs |= CP210X_SERIAL_DTR_SHIFT(CP210X_SERIAL_DTR_INACTIVE);
1164 ctl_hs |= CP210X_SERIAL_DTR_INACTIVE;
1171
1172 if (C_CRTSCTS(tty)) {
1173 ctl_hs |= CP210X_SERIAL_CTS_HANDSHAKE;
1174 flow_repl &= ~CP210X_SERIAL_RTS_MASK;
1165
1166 if (C_CRTSCTS(tty)) {
1167 ctl_hs |= CP210X_SERIAL_CTS_HANDSHAKE;
1168 flow_repl &= ~CP210X_SERIAL_RTS_MASK;
1175 flow_repl |= CP210X_SERIAL_RTS_SHIFT(CP210X_SERIAL_RTS_FLOW_CTL);
1169 flow_repl |= CP210X_SERIAL_RTS_FLOW_CTL;
1176 port_priv->crtscts = true;
1177 } else {
1178 ctl_hs &= ~CP210X_SERIAL_CTS_HANDSHAKE;
1179 flow_repl &= ~CP210X_SERIAL_RTS_MASK;
1180 if (port_priv->rts)
1170 port_priv->crtscts = true;
1171 } else {
1172 ctl_hs &= ~CP210X_SERIAL_CTS_HANDSHAKE;
1173 flow_repl &= ~CP210X_SERIAL_RTS_MASK;
1174 if (port_priv->rts)
1181 flow_repl |= CP210X_SERIAL_RTS_SHIFT(CP210X_SERIAL_RTS_ACTIVE);
1175 flow_repl |= CP210X_SERIAL_RTS_ACTIVE;
1182 else
1176 else
1183 flow_repl |= CP210X_SERIAL_RTS_SHIFT(CP210X_SERIAL_RTS_INACTIVE);
1177 flow_repl |= CP210X_SERIAL_RTS_INACTIVE;
1184 port_priv->crtscts = false;
1185 }
1186
1187 if (I_IXOFF(tty))
1188 flow_repl |= CP210X_SERIAL_AUTO_RECEIVE;
1189 else
1190 flow_repl &= ~CP210X_SERIAL_AUTO_RECEIVE;
1191

--- 732 unchanged lines hidden --- 		1178 port_priv->crtscts = false;
1179 }
1180
1181 if (I_IXOFF(tty))
1182 flow_repl |= CP210X_SERIAL_AUTO_RECEIVE;
1183 else
1184 flow_repl &= ~CP210X_SERIAL_AUTO_RECEIVE;
1185

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