xhci.h (36ec807b627b4c0a0a382f0ae48eac7187d14b2b) | xhci.h (25f51b76f90f10f9bf2fbc05fc51cf685da7ccad) |
---|---|
1/* SPDX-License-Identifier: GPL-2.0 */ 2 3/* 4 * xHCI host controller driver 5 * 6 * Copyright (C) 2008 Intel Corp. 7 * 8 * Author: Sarah Sharp --- 1602 unchanged lines hidden (view full) --- 1611#define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28) 1612#define XHCI_HW_LPM_DISABLE BIT_ULL(29) 1613#define XHCI_SUSPEND_DELAY BIT_ULL(30) 1614#define XHCI_INTEL_USB_ROLE_SW BIT_ULL(31) 1615#define XHCI_ZERO_64B_REGS BIT_ULL(32) 1616#define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33) 1617#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34) 1618#define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) | 1/* SPDX-License-Identifier: GPL-2.0 */ 2 3/* 4 * xHCI host controller driver 5 * 6 * Copyright (C) 2008 Intel Corp. 7 * 8 * Author: Sarah Sharp --- 1602 unchanged lines hidden (view full) --- 1611#define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28) 1612#define XHCI_HW_LPM_DISABLE BIT_ULL(29) 1613#define XHCI_SUSPEND_DELAY BIT_ULL(30) 1614#define XHCI_INTEL_USB_ROLE_SW BIT_ULL(31) 1615#define XHCI_ZERO_64B_REGS BIT_ULL(32) 1616#define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33) 1617#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34) 1618#define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) |
1619#define XHCI_RENESAS_FW_QUIRK BIT_ULL(36) | 1619/* Reserved. It was XHCI_RENESAS_FW_QUIRK */ |
1620#define XHCI_SKIP_PHY_INIT BIT_ULL(37) 1621#define XHCI_DISABLE_SPARSE BIT_ULL(38) 1622#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39) 1623#define XHCI_NO_SOFT_RETRY BIT_ULL(40) 1624#define XHCI_BROKEN_D3COLD_S2I BIT_ULL(41) 1625#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42) 1626#define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43) 1627#define XHCI_RESET_TO_DEFAULT BIT_ULL(44) --- 907 unchanged lines hidden --- | 1620#define XHCI_SKIP_PHY_INIT BIT_ULL(37) 1621#define XHCI_DISABLE_SPARSE BIT_ULL(38) 1622#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39) 1623#define XHCI_NO_SOFT_RETRY BIT_ULL(40) 1624#define XHCI_BROKEN_D3COLD_S2I BIT_ULL(41) 1625#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42) 1626#define XHCI_SUSPEND_RESUME_CLKS BIT_ULL(43) 1627#define XHCI_RESET_TO_DEFAULT BIT_ULL(44) --- 907 unchanged lines hidden --- |