dwc3-pci.c (594ce0b8a998aa4d05827cd7c0d0dcec9a1e3ae2) dwc3-pci.c (2bf35ea46d0bc379c456e14c0ec1dc1e003b39f1)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * dwc3-pci.c - PCI Specific glue layer
4 *
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
6 *
7 * Authors: Felipe Balbi <balbi@ti.com>,
8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>

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49#define PCI_DEVICE_ID_INTEL_RPL 0xa70e
50#define PCI_DEVICE_ID_INTEL_RPLS 0x7a61
51#define PCI_DEVICE_ID_INTEL_MTLM 0x7eb1
52#define PCI_DEVICE_ID_INTEL_MTLP 0x7ec1
53#define PCI_DEVICE_ID_INTEL_MTLS 0x7f6f
54#define PCI_DEVICE_ID_INTEL_MTL 0x7e7e
55#define PCI_DEVICE_ID_INTEL_ARLH_PCH 0x777e
56#define PCI_DEVICE_ID_INTEL_TGL 0x9a15
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * dwc3-pci.c - PCI Specific glue layer
4 *
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
6 *
7 * Authors: Felipe Balbi <balbi@ti.com>,
8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>

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49#define PCI_DEVICE_ID_INTEL_RPL 0xa70e
50#define PCI_DEVICE_ID_INTEL_RPLS 0x7a61
51#define PCI_DEVICE_ID_INTEL_MTLM 0x7eb1
52#define PCI_DEVICE_ID_INTEL_MTLP 0x7ec1
53#define PCI_DEVICE_ID_INTEL_MTLS 0x7f6f
54#define PCI_DEVICE_ID_INTEL_MTL 0x7e7e
55#define PCI_DEVICE_ID_INTEL_ARLH_PCH 0x777e
56#define PCI_DEVICE_ID_INTEL_TGL 0x9a15
57#define PCI_DEVICE_ID_INTEL_PTLH 0xe332
58#define PCI_DEVICE_ID_INTEL_PTLH_PCH 0xe37e
59#define PCI_DEVICE_ID_INTEL_PTLU 0xe432
60#define PCI_DEVICE_ID_INTEL_PTLU_PCH 0xe47e
57#define PCI_DEVICE_ID_AMD_MR 0x163a
58
59#define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
60#define PCI_INTEL_BXT_FUNC_PMU_PWR 4
61#define PCI_INTEL_BXT_STATE_D0 0
62#define PCI_INTEL_BXT_STATE_D3 3
63
64#define GP_RWBAR 1

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425 { PCI_DEVICE_DATA(INTEL, RPL, &dwc3_pci_intel_swnode) },
426 { PCI_DEVICE_DATA(INTEL, RPLS, &dwc3_pci_intel_swnode) },
427 { PCI_DEVICE_DATA(INTEL, MTLM, &dwc3_pci_intel_swnode) },
428 { PCI_DEVICE_DATA(INTEL, MTLP, &dwc3_pci_intel_swnode) },
429 { PCI_DEVICE_DATA(INTEL, MTL, &dwc3_pci_intel_swnode) },
430 { PCI_DEVICE_DATA(INTEL, MTLS, &dwc3_pci_intel_swnode) },
431 { PCI_DEVICE_DATA(INTEL, ARLH_PCH, &dwc3_pci_intel_swnode) },
432 { PCI_DEVICE_DATA(INTEL, TGL, &dwc3_pci_intel_swnode) },
61#define PCI_DEVICE_ID_AMD_MR 0x163a
62
63#define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
64#define PCI_INTEL_BXT_FUNC_PMU_PWR 4
65#define PCI_INTEL_BXT_STATE_D0 0
66#define PCI_INTEL_BXT_STATE_D3 3
67
68#define GP_RWBAR 1

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429 { PCI_DEVICE_DATA(INTEL, RPL, &dwc3_pci_intel_swnode) },
430 { PCI_DEVICE_DATA(INTEL, RPLS, &dwc3_pci_intel_swnode) },
431 { PCI_DEVICE_DATA(INTEL, MTLM, &dwc3_pci_intel_swnode) },
432 { PCI_DEVICE_DATA(INTEL, MTLP, &dwc3_pci_intel_swnode) },
433 { PCI_DEVICE_DATA(INTEL, MTL, &dwc3_pci_intel_swnode) },
434 { PCI_DEVICE_DATA(INTEL, MTLS, &dwc3_pci_intel_swnode) },
435 { PCI_DEVICE_DATA(INTEL, ARLH_PCH, &dwc3_pci_intel_swnode) },
436 { PCI_DEVICE_DATA(INTEL, TGL, &dwc3_pci_intel_swnode) },
437 { PCI_DEVICE_DATA(INTEL, PTLH, &dwc3_pci_intel_swnode) },
438 { PCI_DEVICE_DATA(INTEL, PTLH_PCH, &dwc3_pci_intel_swnode) },
439 { PCI_DEVICE_DATA(INTEL, PTLU, &dwc3_pci_intel_swnode) },
440 { PCI_DEVICE_DATA(INTEL, PTLU_PCH, &dwc3_pci_intel_swnode) },
433
434 { PCI_DEVICE_DATA(AMD, NL_USB, &dwc3_pci_amd_swnode) },
435 { PCI_DEVICE_DATA(AMD, MR, &dwc3_pci_amd_mr_swnode) },
436
437 { } /* Terminating Entry */
438};
439MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
440

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442 { PCI_DEVICE_DATA(AMD, NL_USB, &dwc3_pci_amd_swnode) },
443 { PCI_DEVICE_DATA(AMD, MR, &dwc3_pci_amd_mr_swnode) },
444
445 { } /* Terminating Entry */
446};
447MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
448

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