dwc3-pci.c (46466ae3a105d9620e1355e33125a413b8c6ce18) | dwc3-pci.c (1abade64563ef5388db545b55cf158e849f6e717) |
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1// SPDX-License-Identifier: GPL-2.0 2/* 3 * dwc3-pci.c - PCI Specific glue layer 4 * 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Authors: Felipe Balbi <balbi@ti.com>, 8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> --- 30 unchanged lines hidden (view full) --- 39#define PCI_DEVICE_ID_INTEL_EHL 0x4b7e 40#define PCI_DEVICE_ID_INTEL_TGPLP 0xa0ee 41#define PCI_DEVICE_ID_INTEL_TGPH 0x43ee 42#define PCI_DEVICE_ID_INTEL_JSP 0x4dee 43#define PCI_DEVICE_ID_INTEL_ADLP 0x51ee 44#define PCI_DEVICE_ID_INTEL_ADLM 0x54ee 45#define PCI_DEVICE_ID_INTEL_ADLS 0x7ae1 46#define PCI_DEVICE_ID_INTEL_TGL 0x9a15 | 1// SPDX-License-Identifier: GPL-2.0 2/* 3 * dwc3-pci.c - PCI Specific glue layer 4 * 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Authors: Felipe Balbi <balbi@ti.com>, 8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> --- 30 unchanged lines hidden (view full) --- 39#define PCI_DEVICE_ID_INTEL_EHL 0x4b7e 40#define PCI_DEVICE_ID_INTEL_TGPLP 0xa0ee 41#define PCI_DEVICE_ID_INTEL_TGPH 0x43ee 42#define PCI_DEVICE_ID_INTEL_JSP 0x4dee 43#define PCI_DEVICE_ID_INTEL_ADLP 0x51ee 44#define PCI_DEVICE_ID_INTEL_ADLM 0x54ee 45#define PCI_DEVICE_ID_INTEL_ADLS 0x7ae1 46#define PCI_DEVICE_ID_INTEL_TGL 0x9a15 |
47#define PCI_DEVICE_ID_AMD_MR 0x163a |
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47 48#define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511" 49#define PCI_INTEL_BXT_FUNC_PMU_PWR 4 50#define PCI_INTEL_BXT_STATE_D0 0 51#define PCI_INTEL_BXT_STATE_D3 3 52 53#define GP_RWBAR 1 54#define GP_RWREG1 0xa0 --- 88 unchanged lines hidden (view full) --- 143 /* FIXME these quirks should be removed when AMD NL tapes out */ 144 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"), 145 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"), 146 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"), 147 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 148 {} 149}; 150 | 48 49#define PCI_INTEL_BXT_DSM_GUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511" 50#define PCI_INTEL_BXT_FUNC_PMU_PWR 4 51#define PCI_INTEL_BXT_STATE_D0 0 52#define PCI_INTEL_BXT_STATE_D3 3 53 54#define GP_RWBAR 1 55#define GP_RWREG1 0xa0 --- 88 unchanged lines hidden (view full) --- 144 /* FIXME these quirks should be removed when AMD NL tapes out */ 145 PROPERTY_ENTRY_BOOL("snps,disable_scramble_quirk"), 146 PROPERTY_ENTRY_BOOL("snps,dis_u3_susphy_quirk"), 147 PROPERTY_ENTRY_BOOL("snps,dis_u2_susphy_quirk"), 148 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 149 {} 150}; 151 |
152static const struct property_entry dwc3_pci_mr_properties[] = { 153 PROPERTY_ENTRY_STRING("dr_mode", "otg"), 154 PROPERTY_ENTRY_BOOL("usb-role-switch"), 155 PROPERTY_ENTRY_STRING("role-switch-default-mode", "host"), 156 PROPERTY_ENTRY_BOOL("linux,sysdev_is_parent"), 157 {} 158}; 159 |
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151static const struct software_node dwc3_pci_intel_swnode = { 152 .properties = dwc3_pci_intel_properties, 153}; 154 155static const struct software_node dwc3_pci_intel_mrfld_swnode = { 156 .properties = dwc3_pci_mrfld_properties, 157}; 158 159static const struct software_node dwc3_pci_amd_swnode = { 160 .properties = dwc3_pci_amd_properties, 161}; 162 | 160static const struct software_node dwc3_pci_intel_swnode = { 161 .properties = dwc3_pci_intel_properties, 162}; 163 164static const struct software_node dwc3_pci_intel_mrfld_swnode = { 165 .properties = dwc3_pci_mrfld_properties, 166}; 167 168static const struct software_node dwc3_pci_amd_swnode = { 169 .properties = dwc3_pci_amd_properties, 170}; 171 |
172static const struct software_node dwc3_pci_amd_mr_swnode = { 173 .properties = dwc3_pci_mr_properties, 174}; 175 |
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163static int dwc3_pci_quirks(struct dwc3_pci *dwc) 164{ 165 struct pci_dev *pdev = dwc->pci; 166 167 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 168 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT || 169 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M || 170 pdev->device == PCI_DEVICE_ID_INTEL_EHL) { --- 225 unchanged lines hidden (view full) --- 396 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLS), 397 (kernel_ulong_t) &dwc3_pci_intel_swnode, }, 398 399 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL), 400 (kernel_ulong_t) &dwc3_pci_intel_swnode, }, 401 402 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_NL_USB), 403 (kernel_ulong_t) &dwc3_pci_amd_swnode, }, | 176static int dwc3_pci_quirks(struct dwc3_pci *dwc) 177{ 178 struct pci_dev *pdev = dwc->pci; 179 180 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 181 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT || 182 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M || 183 pdev->device == PCI_DEVICE_ID_INTEL_EHL) { --- 225 unchanged lines hidden (view full) --- 409 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_ADLS), 410 (kernel_ulong_t) &dwc3_pci_intel_swnode, }, 411 412 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_TGL), 413 (kernel_ulong_t) &dwc3_pci_intel_swnode, }, 414 415 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_NL_USB), 416 (kernel_ulong_t) &dwc3_pci_amd_swnode, }, |
417 418 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MR), 419 (kernel_ulong_t)&dwc3_pci_amd_mr_swnode, }, 420 |
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404 { } /* Terminating Entry */ 405}; 406MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 407 408#if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP) 409static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param) 410{ 411 union acpi_object *obj; --- 85 unchanged lines hidden --- | 421 { } /* Terminating Entry */ 422}; 423MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 424 425#if defined(CONFIG_PM) || defined(CONFIG_PM_SLEEP) 426static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param) 427{ 428 union acpi_object *obj; --- 85 unchanged lines hidden --- |