dwc3-pci.c (0f817ae696b0485f7f83ba3e62f2f40fdde8f5c9) dwc3-pci.c (9cecca75b5a0da1bb70465ed3863db5cbf00850b)
1/**
2 * dwc3-pci.c - PCI Specific glue layer
3 *
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8 *

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34#define PCI_DEVICE_ID_INTEL_BSW 0x22b7
35#define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
36#define PCI_DEVICE_ID_INTEL_SPTH 0xa130
37#define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
38#define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
39#define PCI_DEVICE_ID_INTEL_APL 0x5aaa
40#define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
41
1/**
2 * dwc3-pci.c - PCI Specific glue layer
3 *
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8 *

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34#define PCI_DEVICE_ID_INTEL_BSW 0x22b7
35#define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30
36#define PCI_DEVICE_ID_INTEL_SPTH 0xa130
37#define PCI_DEVICE_ID_INTEL_BXT 0x0aaa
38#define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa
39#define PCI_DEVICE_ID_INTEL_APL 0x5aaa
40#define PCI_DEVICE_ID_INTEL_KBP 0xa2b0
41
42#define PCI_INTEL_BXT_DSM_UUID "732b85d5-b7a7-4a1b-9ba0-4bbd00ffd511"
43#define PCI_INTEL_BXT_FUNC_PMU_PWR 4
44#define PCI_INTEL_BXT_STATE_D0 0
45#define PCI_INTEL_BXT_STATE_D3 3
46
42/**
43 * struct dwc3_pci - Driver private structure
44 * @dwc3: child dwc3 platform_device
45 * @pci: our link to PCI bus
47/**
48 * struct dwc3_pci - Driver private structure
49 * @dwc3: child dwc3 platform_device
50 * @pci: our link to PCI bus
51 * @uuid: _DSM UUID
52 * @has_dsm_for_pm: true for devices which need to run _DSM on runtime PM
46 */
47struct dwc3_pci {
48 struct platform_device *dwc3;
49 struct pci_dev *pci;
53 */
54struct dwc3_pci {
55 struct platform_device *dwc3;
56 struct pci_dev *pci;
57
58 u8 uuid[16];
59
60 unsigned int has_dsm_for_pm:1;
50};
51
52static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
53static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
54
55static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
56 { "reset-gpios", &reset_gpios, 1 },
57 { "cs-gpios", &cs_gpios, 1 },

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97 PROPERTY_ENTRY_STRING("dr-mode", "peripheral"),
98 { }
99 };
100
101 ret = platform_device_add_properties(dwc3, properties);
102 if (ret < 0)
103 return ret;
104
61};
62
63static const struct acpi_gpio_params reset_gpios = { 0, 0, false };
64static const struct acpi_gpio_params cs_gpios = { 1, 0, false };
65
66static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = {
67 { "reset-gpios", &reset_gpios, 1 },
68 { "cs-gpios", &cs_gpios, 1 },

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108 PROPERTY_ENTRY_STRING("dr-mode", "peripheral"),
109 { }
110 };
111
112 ret = platform_device_add_properties(dwc3, properties);
113 if (ret < 0)
114 return ret;
115
116 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
117 pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
118 acpi_str_to_uuid(PCI_INTEL_BXT_DSM_UUID, dwc->uuid);
119 dwc->has_dsm_for_pm = true;
120 }
121
105 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
106 struct gpio_desc *gpio;
107
108 acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
109 acpi_dwc3_byt_gpios);
110
111 /*
112 * These GPIOs will turn on the USB2 PHY. Note that we have to

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144 };
145
146 return platform_device_add_properties(dwc3, properties);
147 }
148
149 return 0;
150}
151
122 if (pdev->device == PCI_DEVICE_ID_INTEL_BYT) {
123 struct gpio_desc *gpio;
124
125 acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev),
126 acpi_dwc3_byt_gpios);
127
128 /*
129 * These GPIOs will turn on the USB2 PHY. Note that we have to

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161 };
162
163 return platform_device_add_properties(dwc3, properties);
164 }
165
166 return 0;
167}
168
169static int dwc3_pci_dsm(struct dwc3_pci *dwc, int param)
170{
171 union acpi_object *obj;
172 union acpi_object tmp;
173 union acpi_object argv4 = ACPI_INIT_DSM_ARGV4(1, &tmp);
174
175 if (!dwc->has_dsm_for_pm)
176 return 0;
177
178 tmp.type = ACPI_TYPE_INTEGER;
179 tmp.integer.value = param;
180
181 obj = acpi_evaluate_dsm(ACPI_HANDLE(&dwc->pci->dev), dwc->uuid,
182 1, PCI_INTEL_BXT_FUNC_PMU_PWR, &argv4);
183 if (!obj) {
184 dev_err(&dwc->pci->dev, "failed to evaluate _DSM\n");
185 return -EIO;
186 }
187
188 ACPI_FREE(obj);
189
190 return 0;
191}
192
152static int dwc3_pci_probe(struct pci_dev *pci,
153 const struct pci_device_id *id)
154{
155 struct dwc3_pci *dwc;
156 struct resource res[2];
157 int ret;
158 struct device *dev = &pci->dev;
159

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250 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
251 { } /* Terminating Entry */
252};
253MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
254
255#ifdef CONFIG_PM
256static int dwc3_pci_runtime_suspend(struct device *dev)
257{
193static int dwc3_pci_probe(struct pci_dev *pci,
194 const struct pci_device_id *id)
195{
196 struct dwc3_pci *dwc;
197 struct resource res[2];
198 int ret;
199 struct device *dev = &pci->dev;
200

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291 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), },
292 { } /* Terminating Entry */
293};
294MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table);
295
296#ifdef CONFIG_PM
297static int dwc3_pci_runtime_suspend(struct device *dev)
298{
299 struct dwc3_pci *dwc = dev_get_drvdata(dev);
300
258 if (device_run_wake(dev))
301 if (device_run_wake(dev))
259 return 0;
302 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
260
261 return -EBUSY;
262}
263
264static int dwc3_pci_runtime_resume(struct device *dev)
265{
266 struct dwc3_pci *dwc = dev_get_drvdata(dev);
267 struct platform_device *dwc3 = dwc->dwc3;
303
304 return -EBUSY;
305}
306
307static int dwc3_pci_runtime_resume(struct device *dev)
308{
309 struct dwc3_pci *dwc = dev_get_drvdata(dev);
310 struct platform_device *dwc3 = dwc->dwc3;
311 int ret;
268
312
313 ret = dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
314 if (ret)
315 return ret;
316
269 return pm_runtime_get(&dwc3->dev);
270}
271#endif /* CONFIG_PM */
272
273#ifdef CONFIG_PM_SLEEP
317 return pm_runtime_get(&dwc3->dev);
318}
319#endif /* CONFIG_PM */
320
321#ifdef CONFIG_PM_SLEEP
274static int dwc3_pci_pm_dummy(struct device *dev)
322static int dwc3_pci_suspend(struct device *dev)
275{
323{
276 /*
277 * There's nothing to do here. No, seriously. Everything is either taken
278 * care either by PCI subsystem or dwc3/core.c, so we have nothing
279 * missing here.
280 *
281 * So you'd think we didn't need this at all, but PCI subsystem will
282 * bail out if we don't have a valid callback :-s
283 */
284 return 0;
324 struct dwc3_pci *dwc = dev_get_drvdata(dev);
325
326 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D3);
285}
327}
328
329static int dwc3_pci_resume(struct device *dev)
330{
331 struct dwc3_pci *dwc = dev_get_drvdata(dev);
332
333 return dwc3_pci_dsm(dwc, PCI_INTEL_BXT_STATE_D0);
334}
286#endif /* CONFIG_PM_SLEEP */
287
288static struct dev_pm_ops dwc3_pci_dev_pm_ops = {
335#endif /* CONFIG_PM_SLEEP */
336
337static struct dev_pm_ops dwc3_pci_dev_pm_ops = {
289 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_pm_dummy, dwc3_pci_pm_dummy)
338 SET_SYSTEM_SLEEP_PM_OPS(dwc3_pci_suspend, dwc3_pci_resume)
290 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
291 NULL)
292};
293
294static struct pci_driver dwc3_pci_driver = {
295 .name = "dwc3-pci",
296 .id_table = dwc3_pci_id_table,
297 .probe = dwc3_pci_probe,
298 .remove = dwc3_pci_remove,
299 .driver = {
300 .pm = &dwc3_pci_dev_pm_ops,
301 }
302};
303
304MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
305MODULE_LICENSE("GPL v2");
306MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
307
308module_pci_driver(dwc3_pci_driver);
339 SET_RUNTIME_PM_OPS(dwc3_pci_runtime_suspend, dwc3_pci_runtime_resume,
340 NULL)
341};
342
343static struct pci_driver dwc3_pci_driver = {
344 .name = "dwc3-pci",
345 .id_table = dwc3_pci_id_table,
346 .probe = dwc3_pci_probe,
347 .remove = dwc3_pci_remove,
348 .driver = {
349 .pm = &dwc3_pci_dev_pm_ops,
350 }
351};
352
353MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
354MODULE_LICENSE("GPL v2");
355MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer");
356
357module_pci_driver(dwc3_pci_driver);