| gadget.c (2becdc62a98da6882d7457f7661f70255235ef88) | gadget.c (1ee6903b8f9bbcbeb7cf72e5127d7a0b8aeb267c) |
|---|---|
| 1/** 2 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 3 * http://www.samsung.com 4 * 5 * Copyright 2008 Openmoko, Inc. 6 * Copyright 2008 Simtec Electronics 7 * Ben Dooks <ben@simtec.co.uk> 8 * http://armlinux.simtec.co.uk/ --- 2271 unchanged lines hidden (view full) --- 2280 * dwc2_hsotg_core_init - issue softreset to the core 2281 * @hsotg: The device state 2282 * 2283 * Issue a soft reset to the core, and await the core finishing it. 2284 */ 2285void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, 2286 bool is_usb_reset) 2287{ | 1/** 2 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 3 * http://www.samsung.com 4 * 5 * Copyright 2008 Openmoko, Inc. 6 * Copyright 2008 Simtec Electronics 7 * Ben Dooks <ben@simtec.co.uk> 8 * http://armlinux.simtec.co.uk/ --- 2271 unchanged lines hidden (view full) --- 2280 * dwc2_hsotg_core_init - issue softreset to the core 2281 * @hsotg: The device state 2282 * 2283 * Issue a soft reset to the core, and await the core finishing it. 2284 */ 2285void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, 2286 bool is_usb_reset) 2287{ |
| 2288 u32 intmsk; |
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| 2288 u32 val; 2289 2290 /* Kill any ep0 requests as controller will be reinitialized */ 2291 kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); 2292 2293 if (!is_usb_reset) 2294 if (dwc2_hsotg_corereset(hsotg)) 2295 return; --- 15 unchanged lines hidden (view full) --- 2311 2312 dwc2_writel(DCFG_EPMISCNT(1) | DCFG_DEVSPD_HS, hsotg->regs + DCFG); 2313 2314 /* Clear any pending OTG interrupts */ 2315 dwc2_writel(0xffffffff, hsotg->regs + GOTGINT); 2316 2317 /* Clear any pending interrupts */ 2318 dwc2_writel(0xffffffff, hsotg->regs + GINTSTS); | 2289 u32 val; 2290 2291 /* Kill any ep0 requests as controller will be reinitialized */ 2292 kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); 2293 2294 if (!is_usb_reset) 2295 if (dwc2_hsotg_corereset(hsotg)) 2296 return; --- 15 unchanged lines hidden (view full) --- 2312 2313 dwc2_writel(DCFG_EPMISCNT(1) | DCFG_DEVSPD_HS, hsotg->regs + DCFG); 2314 2315 /* Clear any pending OTG interrupts */ 2316 dwc2_writel(0xffffffff, hsotg->regs + GOTGINT); 2317 2318 /* Clear any pending interrupts */ 2319 dwc2_writel(0xffffffff, hsotg->regs + GINTSTS); |
| 2319 2320 dwc2_writel(GINTSTS_ERLYSUSP | GINTSTS_SESSREQINT | | 2320 intmsk = GINTSTS_ERLYSUSP | GINTSTS_SESSREQINT | |
| 2321 GINTSTS_GOUTNAKEFF | GINTSTS_GINNAKEFF | | 2321 GINTSTS_GOUTNAKEFF | GINTSTS_GINNAKEFF | |
| 2322 GINTSTS_CONIDSTSCHNG | GINTSTS_USBRST | 2323 GINTSTS_RESETDET | GINTSTS_ENUMDONE | 2324 GINTSTS_OTGINT | GINTSTS_USBSUSP | 2325 GINTSTS_WKUPINT, 2326 hsotg->regs + GINTMSK); | 2322 GINTSTS_USBRST | GINTSTS_RESETDET | 2323 GINTSTS_ENUMDONE | GINTSTS_OTGINT | 2324 GINTSTS_USBSUSP | GINTSTS_WKUPINT; |
| 2327 | 2325 |
| 2326 if (hsotg->core_params->external_id_pin_ctl <= 0) 2327 intmsk |= GINTSTS_CONIDSTSCHNG; 2328 2329 dwc2_writel(intmsk, hsotg->regs + GINTMSK); 2330 |
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| 2328 if (using_dma(hsotg)) 2329 dwc2_writel(GAHBCFG_GLBL_INTR_EN | GAHBCFG_DMA_EN | 2330 (GAHBCFG_HBSTLEN_INCR4 << GAHBCFG_HBSTLEN_SHIFT), 2331 hsotg->regs + GAHBCFG); 2332 else 2333 dwc2_writel(((hsotg->dedicated_fifos) ? 2334 (GAHBCFG_NP_TXF_EMP_LVL | 2335 GAHBCFG_P_TXF_EMP_LVL) : 0) | --- 1512 unchanged lines hidden --- | 2331 if (using_dma(hsotg)) 2332 dwc2_writel(GAHBCFG_GLBL_INTR_EN | GAHBCFG_DMA_EN | 2333 (GAHBCFG_HBSTLEN_INCR4 << GAHBCFG_HBSTLEN_SHIFT), 2334 hsotg->regs + GAHBCFG); 2335 else 2336 dwc2_writel(((hsotg->dedicated_fifos) ? 2337 (GAHBCFG_NP_TXF_EMP_LVL | 2338 GAHBCFG_P_TXF_EMP_LVL) : 0) | --- 1512 unchanged lines hidden --- |