ufs-qcom.h (9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e) | ufs-qcom.h (56541c7c4468a9de26d82ba6e8c10ace286f8fdd) |
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1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 3 */ 4 5#ifndef UFS_QCOM_H_ 6#define UFS_QCOM_H_ 7 8#include <linux/reset-controller.h> 9#include <linux/reset.h> | 1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved. 3 */ 4 5#ifndef UFS_QCOM_H_ 6#define UFS_QCOM_H_ 7 8#include <linux/reset-controller.h> 9#include <linux/reset.h> |
10#include <soc/qcom/ice.h> |
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10#include <ufs/ufshcd.h> 11 12#define MAX_UFS_QCOM_HOSTS 1 13#define MAX_U32 (~(u32)0) 14#define MPHY_TX_FSM_STATE 0x41 15#define TX_FSM_HIBERN8 0x1 16#define HBRN8_POLL_TOUT_MS 100 17#define DEFAULT_CLK_RATE_HZ 1000000 --- 182 unchanged lines hidden (view full) --- 200 struct ufs_hba *hba; 201 struct ufs_pa_layer_attr dev_req_params; 202 struct clk *rx_l0_sync_clk; 203 struct clk *tx_l0_sync_clk; 204 struct clk *rx_l1_sync_clk; 205 struct clk *tx_l1_sync_clk; 206 bool is_lane_clks_enabled; 207 | 11#include <ufs/ufshcd.h> 12 13#define MAX_UFS_QCOM_HOSTS 1 14#define MAX_U32 (~(u32)0) 15#define MPHY_TX_FSM_STATE 0x41 16#define TX_FSM_HIBERN8 0x1 17#define HBRN8_POLL_TOUT_MS 100 18#define DEFAULT_CLK_RATE_HZ 1000000 --- 182 unchanged lines hidden (view full) --- 201 struct ufs_hba *hba; 202 struct ufs_pa_layer_attr dev_req_params; 203 struct clk *rx_l0_sync_clk; 204 struct clk *tx_l0_sync_clk; 205 struct clk *rx_l1_sync_clk; 206 struct clk *tx_l1_sync_clk; 207 bool is_lane_clks_enabled; 208 |
209#ifdef CONFIG_SCSI_UFS_CRYPTO 210 struct qcom_ice *ice; 211#endif 212 |
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208 void __iomem *dev_ref_clk_ctrl_mmio; 209 bool is_dev_ref_clk_enabled; 210 struct ufs_hw_version hw_ver; | 213 void __iomem *dev_ref_clk_ctrl_mmio; 214 bool is_dev_ref_clk_enabled; 215 struct ufs_hw_version hw_ver; |
211#ifdef CONFIG_SCSI_UFS_CRYPTO 212 void __iomem *ice_mmio; 213#endif | |
214 215 u32 dev_ref_clk_en_mask; 216 217 struct ufs_qcom_testbus testbus; 218 219 /* Reset control of HCI */ 220 struct reset_control *core_reset; 221 struct reset_controller_dev rcdev; --- 21 unchanged lines hidden (view full) --- 243 244int ufs_qcom_testbus_config(struct ufs_qcom_host *host); 245 246static inline bool ufs_qcom_cap_qunipro(struct ufs_qcom_host *host) 247{ 248 return host->caps & UFS_QCOM_CAP_QUNIPRO; 249} 250 | 216 217 u32 dev_ref_clk_en_mask; 218 219 struct ufs_qcom_testbus testbus; 220 221 /* Reset control of HCI */ 222 struct reset_control *core_reset; 223 struct reset_controller_dev rcdev; --- 21 unchanged lines hidden (view full) --- 245 246int ufs_qcom_testbus_config(struct ufs_qcom_host *host); 247 248static inline bool ufs_qcom_cap_qunipro(struct ufs_qcom_host *host) 249{ 250 return host->caps & UFS_QCOM_CAP_QUNIPRO; 251} 252 |
251/* ufs-qcom-ice.c */ 252 253#ifdef CONFIG_SCSI_UFS_CRYPTO 254int ufs_qcom_ice_init(struct ufs_qcom_host *host); 255int ufs_qcom_ice_enable(struct ufs_qcom_host *host); 256int ufs_qcom_ice_resume(struct ufs_qcom_host *host); 257int ufs_qcom_ice_program_key(struct ufs_hba *hba, 258 const union ufs_crypto_cfg_entry *cfg, int slot); 259#else 260static inline int ufs_qcom_ice_init(struct ufs_qcom_host *host) 261{ 262 return 0; 263} 264static inline int ufs_qcom_ice_enable(struct ufs_qcom_host *host) 265{ 266 return 0; 267} 268static inline int ufs_qcom_ice_resume(struct ufs_qcom_host *host) 269{ 270 return 0; 271} 272#define ufs_qcom_ice_program_key NULL 273#endif /* !CONFIG_SCSI_UFS_CRYPTO */ 274 | |
275#endif /* UFS_QCOM_H_ */ | 253#endif /* UFS_QCOM_H_ */ |