sifive.c (fd2b55f86b8b25afc5b6e7dff53dddb3fd0dd211) | sifive.c (b75c1da925d991acae8b2abbb2e5ea321b9bbefb) |
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1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * SiFive UART driver 4 * Copyright (C) 2018 Paul Walmsley <paul@pwsan.com> 5 * Copyright (C) 2018-2019 SiFive 6 * 7 * Based partially on: 8 * - drivers/tty/serial/pxa.c --- 903 unchanged lines hidden (view full) --- 912 struct clk *clk; 913 void __iomem *base; 914 int irq, id, r; 915 916 irq = platform_get_irq(pdev, 0); 917 if (irq < 0) 918 return -EPROBE_DEFER; 919 | 1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * SiFive UART driver 4 * Copyright (C) 2018 Paul Walmsley <paul@pwsan.com> 5 * Copyright (C) 2018-2019 SiFive 6 * 7 * Based partially on: 8 * - drivers/tty/serial/pxa.c --- 903 unchanged lines hidden (view full) --- 912 struct clk *clk; 913 void __iomem *base; 914 int irq, id, r; 915 916 irq = platform_get_irq(pdev, 0); 917 if (irq < 0) 918 return -EPROBE_DEFER; 919 |
920 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 921 base = devm_ioremap_resource(&pdev->dev, mem); 922 if (IS_ERR(base)) { 923 dev_err(&pdev->dev, "could not acquire device memory\n"); | 920 base = devm_platform_get_and_ioremap_resource(pdev, 0, &mem); 921 if (IS_ERR(base)) |
924 return PTR_ERR(base); | 922 return PTR_ERR(base); |
925 } | |
926 927 clk = devm_clk_get_enabled(&pdev->dev, NULL); 928 if (IS_ERR(clk)) { 929 dev_err(&pdev->dev, "unable to find controller clock\n"); 930 return PTR_ERR(clk); 931 } 932 933 id = of_alias_get_id(pdev->dev.of_node, "serial"); --- 139 unchanged lines hidden --- | 923 924 clk = devm_clk_get_enabled(&pdev->dev, NULL); 925 if (IS_ERR(clk)) { 926 dev_err(&pdev->dev, "unable to find controller clock\n"); 927 return PTR_ERR(clk); 928 } 929 930 id = of_alias_get_id(pdev->dev.of_node, "serial"); --- 139 unchanged lines hidden --- |