| lpc32xx_hs.c (e5451c8f8330e03ad3cfa16048b4daf961af434f) | lpc32xx_hs.c (2331e06865047a0c4ff3fb838716210e7a296a4d) |
|---|---|
| 1/* 2 * High Speed Serial Ports on NXP LPC32xx SoC 3 * 4 * Authors: Kevin Wells <kevin.wells@nxp.com> 5 * Roland Stigge <stigge@antcom.de> 6 * 7 * Copyright (C) 2010 NXP Semiconductors 8 * Copyright (C) 2012 Roland Stigge --- 631 unchanged lines hidden (view full) --- 640 int ret = 0; 641 642 if (ser->type != PORT_UART00) 643 ret = -EINVAL; 644 645 return ret; 646} 647 | 1/* 2 * High Speed Serial Ports on NXP LPC32xx SoC 3 * 4 * Authors: Kevin Wells <kevin.wells@nxp.com> 5 * Roland Stigge <stigge@antcom.de> 6 * 7 * Copyright (C) 2010 NXP Semiconductors 8 * Copyright (C) 2012 Roland Stigge --- 631 unchanged lines hidden (view full) --- 640 int ret = 0; 641 642 if (ser->type != PORT_UART00) 643 ret = -EINVAL; 644 645 return ret; 646} 647 |
| 648static struct uart_ops serial_lpc32xx_pops = { | 648static const struct uart_ops serial_lpc32xx_pops = { |
| 649 .tx_empty = serial_lpc32xx_tx_empty, 650 .set_mctrl = serial_lpc32xx_set_mctrl, 651 .get_mctrl = serial_lpc32xx_get_mctrl, 652 .stop_tx = serial_lpc32xx_stop_tx, 653 .start_tx = serial_lpc32xx_start_tx, 654 .stop_rx = serial_lpc32xx_stop_rx, 655 .break_ctl = serial_lpc32xx_break_ctl, 656 .startup = serial_lpc32xx_startup, --- 147 unchanged lines hidden --- | 649 .tx_empty = serial_lpc32xx_tx_empty, 650 .set_mctrl = serial_lpc32xx_set_mctrl, 651 .get_mctrl = serial_lpc32xx_get_mctrl, 652 .stop_tx = serial_lpc32xx_stop_tx, 653 .start_tx = serial_lpc32xx_start_tx, 654 .stop_rx = serial_lpc32xx_stop_rx, 655 .break_ctl = serial_lpc32xx_break_ctl, 656 .startup = serial_lpc32xx_startup, --- 147 unchanged lines hidden --- |