exynos_tmu.c (b9504a6a3d668e4995420e311869291b21b81b37) exynos_tmu.c (77a37a92ca18e4385bfcca9f2762d39fe83110b9)
1/*
2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
3 *
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
7 *
8 * This program is free software; you can redistribute it and/or modify

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261 } else if (i == EXYNOS_MAX_TRIGGER_PER_REG) {
262 /* 5th level to be assigned in th2 reg */
263 rising_threshold =
264 threshold_code << reg->threshold_th3_l0_shift;
265 writel(rising_threshold,
266 data->base + reg->threshold_th2);
267 }
268 con = readl(data->base + reg->tmu_ctrl);
1/*
2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
3 *
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
7 *
8 * This program is free software; you can redistribute it and/or modify

--- 252 unchanged lines hidden (view full) ---

261 } else if (i == EXYNOS_MAX_TRIGGER_PER_REG) {
262 /* 5th level to be assigned in th2 reg */
263 rising_threshold =
264 threshold_code << reg->threshold_th3_l0_shift;
265 writel(rising_threshold,
266 data->base + reg->threshold_th2);
267 }
268 con = readl(data->base + reg->tmu_ctrl);
269 con |= (1 << reg->therm_trip_en_shift);
269 con |= (1 << EXYNOS_TMU_THERM_TRIP_EN_SHIFT);
270 writel(con, data->base + reg->tmu_ctrl);
271 }
272 }
273 /*Clear the PMIN in the common TMU register*/
274 if (reg->tmu_pmin && !data->id)
275 writel(0, data->base_second + reg->tmu_pmin);
276out:
277 clk_disable(data->clk);

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270 writel(con, data->base + reg->tmu_ctrl);
271 }
272 }
273 /*Clear the PMIN in the common TMU register*/
274 if (reg->tmu_pmin && !data->id)
275 writel(0, data->base_second + reg->tmu_pmin);
276out:
277 clk_disable(data->clk);

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