exynos_tmu.c (a7331f72d3eb2bf6a15405459f7c514607402ca6) exynos_tmu.c (e0761533a1d41e7486bddac75ee878e9814ec0e3)
1/*
2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
3 *
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
7 *
8 * This program is free software; you can redistribute it and/or modify

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368
369 if (on) {
370 con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
371 interrupt_en =
372 pdata->trigger_enable[3] << EXYNOS_TMU_INTEN_RISE3_SHIFT |
373 pdata->trigger_enable[2] << EXYNOS_TMU_INTEN_RISE2_SHIFT |
374 pdata->trigger_enable[1] << EXYNOS_TMU_INTEN_RISE1_SHIFT |
375 pdata->trigger_enable[0] << EXYNOS_TMU_INTEN_RISE0_SHIFT;
1/*
2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit)
3 *
4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com>
6 * Amit Daniel Kachhap <amit.kachhap@linaro.org>
7 *
8 * This program is free software; you can redistribute it and/or modify

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368
369 if (on) {
370 con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
371 interrupt_en =
372 pdata->trigger_enable[3] << EXYNOS_TMU_INTEN_RISE3_SHIFT |
373 pdata->trigger_enable[2] << EXYNOS_TMU_INTEN_RISE2_SHIFT |
374 pdata->trigger_enable[1] << EXYNOS_TMU_INTEN_RISE1_SHIFT |
375 pdata->trigger_enable[0] << EXYNOS_TMU_INTEN_RISE0_SHIFT;
376 if (TMU_SUPPORTS(pdata, FALLING_TRIP))
376 if (data->soc != SOC_ARCH_EXYNOS4210)
377 interrupt_en |=
378 interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
379 } else {
380 con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
381 interrupt_en = 0; /* Disable all interrupts */
382 }
383 writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
384 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);

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394
395 if (on) {
396 con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
397 interrupt_en =
398 pdata->trigger_enable[3] << EXYNOS5440_TMU_INTEN_RISE3_SHIFT |
399 pdata->trigger_enable[2] << EXYNOS5440_TMU_INTEN_RISE2_SHIFT |
400 pdata->trigger_enable[1] << EXYNOS5440_TMU_INTEN_RISE1_SHIFT |
401 pdata->trigger_enable[0] << EXYNOS5440_TMU_INTEN_RISE0_SHIFT;
377 interrupt_en |=
378 interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
379 } else {
380 con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
381 interrupt_en = 0; /* Disable all interrupts */
382 }
383 writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
384 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);

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394
395 if (on) {
396 con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
397 interrupt_en =
398 pdata->trigger_enable[3] << EXYNOS5440_TMU_INTEN_RISE3_SHIFT |
399 pdata->trigger_enable[2] << EXYNOS5440_TMU_INTEN_RISE2_SHIFT |
400 pdata->trigger_enable[1] << EXYNOS5440_TMU_INTEN_RISE1_SHIFT |
401 pdata->trigger_enable[0] << EXYNOS5440_TMU_INTEN_RISE0_SHIFT;
402 if (TMU_SUPPORTS(pdata, FALLING_TRIP))
403 interrupt_en |=
404 interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;
402 interrupt_en |= interrupt_en << EXYNOS5440_TMU_INTEN_FALL0_SHIFT;
405 } else {
406 con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
407 interrupt_en = 0; /* Disable all interrupts */
408 }
409 writel(interrupt_en, data->base + EXYNOS5440_TMU_S0_7_IRQEN);
410 writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL);
411}
412

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403 } else {
404 con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
405 interrupt_en = 0; /* Disable all interrupts */
406 }
407 writel(interrupt_en, data->base + EXYNOS5440_TMU_S0_7_IRQEN);
408 writel(con, data->base + EXYNOS5440_TMU_S0_7_CTRL);
409}
410

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