| exynos_tmu.c (9c7a87f146a642447db29327bcedfbe2163da172) | exynos_tmu.c (99d67fb993bbe2f27b0004332218108d66c78af4) |
|---|---|
| 1/* 2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit) 3 * 4 * Copyright (C) 2011 Samsung Electronics 5 * Donggeun Kim <dg77.kim@samsung.com> 6 * Amit Daniel Kachhap <amit.kachhap@linaro.org> 7 * 8 * This program is free software; you can redistribute it and/or modify --- 160 unchanged lines hidden (view full) --- 169 /* On exynos5420 the triminfo register is in the shared space */ 170 if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) 171 trim_info = readl(data->base_second + 172 reg->triminfo_data); 173 else 174 trim_info = readl(data->base + reg->triminfo_data); 175 } 176 data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK; | 1/* 2 * exynos_tmu.c - Samsung EXYNOS TMU (Thermal Management Unit) 3 * 4 * Copyright (C) 2011 Samsung Electronics 5 * Donggeun Kim <dg77.kim@samsung.com> 6 * Amit Daniel Kachhap <amit.kachhap@linaro.org> 7 * 8 * This program is free software; you can redistribute it and/or modify --- 160 unchanged lines hidden (view full) --- 169 /* On exynos5420 the triminfo register is in the shared space */ 170 if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) 171 trim_info = readl(data->base_second + 172 reg->triminfo_data); 173 else 174 trim_info = readl(data->base + reg->triminfo_data); 175 } 176 data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK; |
| 177 data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) & | 177 data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) & |
| 178 EXYNOS_TMU_TEMP_MASK); 179 180 if (!data->temp_error1 || 181 (pdata->min_efuse_value > data->temp_error1) || 182 (data->temp_error1 > pdata->max_efuse_value)) 183 data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK; 184 185 if (!data->temp_error2) 186 data->temp_error2 = | 178 EXYNOS_TMU_TEMP_MASK); 179 180 if (!data->temp_error1 || 181 (pdata->min_efuse_value > data->temp_error1) || 182 (data->temp_error1 > pdata->max_efuse_value)) 183 data->temp_error1 = pdata->efuse_value & EXYNOS_TMU_TEMP_MASK; 184 185 if (!data->temp_error2) 186 data->temp_error2 = |
| 187 (pdata->efuse_value >> reg->triminfo_85_shift) & | 187 (pdata->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) & |
| 188 EXYNOS_TMU_TEMP_MASK; 189 190 rising_threshold = readl(data->base + reg->threshold_th0); 191 192 if (data->soc == SOC_ARCH_EXYNOS4210) { 193 /* Write temperature code for threshold */ 194 threshold_code = temp_to_code(data, pdata->threshold); 195 writeb(threshold_code, --- 73 unchanged lines hidden (view full) --- 269 mutex_lock(&data->lock); 270 clk_enable(data->clk); 271 272 con = readl(data->base + reg->tmu_ctrl); 273 274 if (pdata->test_mux) 275 con |= (pdata->test_mux << reg->test_mux_addr_shift); 276 | 188 EXYNOS_TMU_TEMP_MASK; 189 190 rising_threshold = readl(data->base + reg->threshold_th0); 191 192 if (data->soc == SOC_ARCH_EXYNOS4210) { 193 /* Write temperature code for threshold */ 194 threshold_code = temp_to_code(data, pdata->threshold); 195 writeb(threshold_code, --- 73 unchanged lines hidden (view full) --- 269 mutex_lock(&data->lock); 270 clk_enable(data->clk); 271 272 con = readl(data->base + reg->tmu_ctrl); 273 274 if (pdata->test_mux) 275 con |= (pdata->test_mux << reg->test_mux_addr_shift); 276 |
| 277 con &= ~(reg->buf_vref_sel_mask << reg->buf_vref_sel_shift); 278 con |= pdata->reference_voltage << reg->buf_vref_sel_shift; | 277 con &= ~(EXYNOS_TMU_REF_VOLTAGE_MASK << EXYNOS_TMU_REF_VOLTAGE_SHIFT); 278 con |= pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT; |
| 279 | 279 |
| 280 con &= ~(reg->buf_slope_sel_mask << reg->buf_slope_sel_shift); 281 con |= (pdata->gain << reg->buf_slope_sel_shift); | 280 con &= ~(EXYNOS_TMU_BUF_SLOPE_SEL_MASK << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT); 281 con |= (pdata->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT); |
| 282 283 if (pdata->noise_cancel_mode) { 284 con &= ~(reg->therm_trip_mode_mask << 285 reg->therm_trip_mode_shift); 286 con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift); 287 } 288 289 if (on) { | 282 283 if (pdata->noise_cancel_mode) { 284 con &= ~(reg->therm_trip_mode_mask << 285 reg->therm_trip_mode_shift); 286 con |= (pdata->noise_cancel_mode << reg->therm_trip_mode_shift); 287 } 288 289 if (on) { |
| 290 con |= (1 << reg->core_en_shift); | 290 con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); |
| 291 interrupt_en = 292 pdata->trigger_enable[3] << reg->inten_rise3_shift | 293 pdata->trigger_enable[2] << reg->inten_rise2_shift | 294 pdata->trigger_enable[1] << reg->inten_rise1_shift | 295 pdata->trigger_enable[0] << reg->inten_rise0_shift; 296 if (TMU_SUPPORTS(pdata, FALLING_TRIP)) 297 interrupt_en |= 298 interrupt_en << reg->inten_fall0_shift; 299 } else { | 291 interrupt_en = 292 pdata->trigger_enable[3] << reg->inten_rise3_shift | 293 pdata->trigger_enable[2] << reg->inten_rise2_shift | 294 pdata->trigger_enable[1] << reg->inten_rise1_shift | 295 pdata->trigger_enable[0] << reg->inten_rise0_shift; 296 if (TMU_SUPPORTS(pdata, FALLING_TRIP)) 297 interrupt_en |= 298 interrupt_en << reg->inten_fall0_shift; 299 } else { |
| 300 con &= ~(1 << reg->core_en_shift); | 300 con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); |
| 301 interrupt_en = 0; /* Disable all interrupts */ 302 } 303 writel(interrupt_en, data->base + reg->tmu_inten); 304 writel(con, data->base + reg->tmu_ctrl); 305 306 clk_disable(data->clk); 307 mutex_unlock(&data->lock); 308} --- 436 unchanged lines hidden --- | 301 interrupt_en = 0; /* Disable all interrupts */ 302 } 303 writel(interrupt_en, data->base + reg->tmu_inten); 304 writel(con, data->base + reg->tmu_ctrl); 305 306 clk_disable(data->clk); 307 mutex_unlock(&data->lock); 308} --- 436 unchanged lines hidden --- |