speedo-tegra210.c (75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37) speedo-tegra210.c (6c37cb9fa67650c51b3a70c53202be31730d7e29)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved.
4 */
5
6#include <linux/device.h>
7#include <linux/kernel.h>
8#include <linux/bug.h>

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97 if (value < speedos[num])
98 return i;
99
100 return -EINVAL;
101}
102
103void __init tegra210_init_speedo_data(struct tegra_sku_info *sku_info)
104{
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2013-2015, NVIDIA CORPORATION. All rights reserved.
4 */
5
6#include <linux/device.h>
7#include <linux/kernel.h>
8#include <linux/bug.h>

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97 if (value < speedos[num])
98 return i;
99
100 return -EINVAL;
101}
102
103void __init tegra210_init_speedo_data(struct tegra_sku_info *sku_info)
104{
105 int cpu_speedo[3], soc_speedo[3], cpu_iddq, gpu_iddq, soc_iddq;
105 int cpu_speedo[3], soc_speedo[3];
106 unsigned int index;
107 u8 speedo_revision;
108
109 BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) !=
110 THRESHOLD_INDEX_COUNT);
111 BUILD_BUG_ON(ARRAY_SIZE(gpu_process_speedos) !=
112 THRESHOLD_INDEX_COUNT);
113 BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) !=
114 THRESHOLD_INDEX_COUNT);
115
116 /* Read speedo/IDDQ fuses */
117 cpu_speedo[0] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_0);
118 cpu_speedo[1] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_1);
119 cpu_speedo[2] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_2);
120
121 soc_speedo[0] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_0);
122 soc_speedo[1] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_1);
123 soc_speedo[2] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_2);
124
106 unsigned int index;
107 u8 speedo_revision;
108
109 BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) !=
110 THRESHOLD_INDEX_COUNT);
111 BUILD_BUG_ON(ARRAY_SIZE(gpu_process_speedos) !=
112 THRESHOLD_INDEX_COUNT);
113 BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) !=
114 THRESHOLD_INDEX_COUNT);
115
116 /* Read speedo/IDDQ fuses */
117 cpu_speedo[0] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_0);
118 cpu_speedo[1] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_1);
119 cpu_speedo[2] = tegra_fuse_read_early(FUSE_CPU_SPEEDO_2);
120
121 soc_speedo[0] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_0);
122 soc_speedo[1] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_1);
123 soc_speedo[2] = tegra_fuse_read_early(FUSE_SOC_SPEEDO_2);
124
125 cpu_iddq = tegra_fuse_read_early(FUSE_CPU_IDDQ) * 4;
126 soc_iddq = tegra_fuse_read_early(FUSE_SOC_IDDQ) * 4;
127 gpu_iddq = tegra_fuse_read_early(FUSE_GPU_IDDQ) * 5;
128
129 /*
130 * Determine CPU, GPU and SoC speedo values depending on speedo fusing
131 * revision. Note that GPU speedo value is fused in CPU_SPEEDO_2.
132 */
133 speedo_revision = get_speedo_revision();
134 pr_info("Speedo Revision %u\n", speedo_revision);
135
136 if (speedo_revision >= 3) {

--- 37 unchanged lines hidden --- 		125 /*
126 * Determine CPU, GPU and SoC speedo values depending on speedo fusing
127 * revision. Note that GPU speedo value is fused in CPU_SPEEDO_2.
128 */
129 speedo_revision = get_speedo_revision();
130 pr_info("Speedo Revision %u\n", speedo_revision);
131
132 if (speedo_revision >= 3) {

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