exynos-pmu.c (cc0f7c3f97bc6e888bf4be28a9da9dbd3735d2b4) exynos-pmu.c (35d6b98c625867209bc47df99cf03edf4280799f)
1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
4// http://www.samsung.com/
5//
6// Exynos - CPU PMU(Power Management Unit) support
7
8#include <linux/arm-smccc.h>

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124
125 ret = tensor_sec_reg_write(ctx, offset, i);
126 if (ret)
127 return ret;
128 }
129 return ret;
130}
131
1// SPDX-License-Identifier: GPL-2.0
2//
3// Copyright (c) 2011-2014 Samsung Electronics Co., Ltd.
4// http://www.samsung.com/
5//
6// Exynos - CPU PMU(Power Management Unit) support
7
8#include <linux/arm-smccc.h>

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124
125 ret = tensor_sec_reg_write(ctx, offset, i);
126 if (ret)
127 return ret;
128 }
129 return ret;
130}
131
132static bool tensor_is_atomic(unsigned int reg)
132static int tensor_sec_update_bits(void *ctx, unsigned int reg,
133 unsigned int mask, unsigned int val)
133{
134 /*
135 * Use atomic operations for PMU_ALIVE registers (offset 0~0x3FFF)
134{
135 /*
136 * Use atomic operations for PMU_ALIVE registers (offset 0~0x3FFF)
136 * as the target registers can be accessed by multiple masters. SFRs
137 * that don't support atomic are added to the switch statement below.
137 * as the target registers can be accessed by multiple masters.
138 */
139 if (reg > PMUALIVE_MASK)
138 */
139 if (reg > PMUALIVE_MASK)
140 return false;
141
142 switch (reg) {
143 case GS101_SYSIP_DAT0:
144 case GS101_SYSTEM_CONFIGURATION:
145 return false;
146 default:
147 return true;
148 }
149}
150
151static int tensor_sec_update_bits(void *ctx, unsigned int reg,
152 unsigned int mask, unsigned int val)
153{
154
155 if (!tensor_is_atomic(reg))
156 return tensor_sec_reg_rmw(ctx, reg, mask, val);
157
158 return tensor_set_bits_atomic(ctx, reg, val, mask);
159}
160
161void pmu_raw_writel(u32 val, u32 offset)
162{
163 writel_relaxed(val, pmu_base_addr + offset);

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215 .fast_io = true,
216 .use_single_read = true,
217 .use_single_write = true,
218 .reg_read = tensor_sec_reg_read,
219 .reg_write = tensor_sec_reg_write,
220 .reg_update_bits = tensor_sec_update_bits,
221};
222
140 return tensor_sec_reg_rmw(ctx, reg, mask, val);
141
142 return tensor_set_bits_atomic(ctx, reg, val, mask);
143}
144
145void pmu_raw_writel(u32 val, u32 offset)
146{
147 writel_relaxed(val, pmu_base_addr + offset);

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199 .fast_io = true,
200 .use_single_read = true,
201 .use_single_write = true,
202 .reg_read = tensor_sec_reg_read,
203 .reg_write = tensor_sec_reg_write,
204 .reg_update_bits = tensor_sec_update_bits,
205};
206
223static const struct regmap_config regmap_mmiocfg = {
224 .name = "pmu_regs",
225 .reg_bits = 32,
226 .reg_stride = 4,
227 .val_bits = 32,
228 .fast_io = true,
229 .use_single_read = true,
230 .use_single_write = true,
231};
232
233static const struct exynos_pmu_data gs101_pmu_data = {
234 .pmu_secure = true
235};
236
237/*
238 * PMU platform driver and devicetree bindings.
239 */
240static const struct of_device_id exynos_pmu_of_device_ids[] = {

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301 * Find the pmureg regmap previously configured in probe() and return regmap
302 * pointer.
303 *
304 * Return: A pointer to regmap if found or ERR_PTR error value.
305 */
306struct regmap *exynos_get_pmu_regmap_by_phandle(struct device_node *np,
307 const char *propname)
308{
207static const struct exynos_pmu_data gs101_pmu_data = {
208 .pmu_secure = true
209};
210
211/*
212 * PMU platform driver and devicetree bindings.
213 */
214static const struct of_device_id exynos_pmu_of_device_ids[] = {

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275 * Find the pmureg regmap previously configured in probe() and return regmap
276 * pointer.
277 *
278 * Return: A pointer to regmap if found or ERR_PTR error value.
279 */
280struct regmap *exynos_get_pmu_regmap_by_phandle(struct device_node *np,
281 const char *propname)
282{
309 struct exynos_pmu_context *ctx;
310 struct device_node *pmu_np;
311 struct device *dev;
312
313 if (propname)
314 pmu_np = of_parse_phandle(np, propname, 0);
315 else
316 pmu_np = np;
317

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327 (void *)pmu_np);
328
329 if (propname)
330 of_node_put(pmu_np);
331
332 if (!dev)
333 return ERR_PTR(-EPROBE_DEFER);
334
283 struct device_node *pmu_np;
284 struct device *dev;
285
286 if (propname)
287 pmu_np = of_parse_phandle(np, propname, 0);
288 else
289 pmu_np = np;
290

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300 (void *)pmu_np);
301
302 if (propname)
303 of_node_put(pmu_np);
304
305 if (!dev)
306 return ERR_PTR(-EPROBE_DEFER);
307
335 ctx = dev_get_drvdata(dev);
336
337 return ctx->pmureg;
308 return syscon_node_to_regmap(pmu_np);
338}
339EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap_by_phandle);
340
341static int exynos_pmu_probe(struct platform_device *pdev)
342{
343 struct device *dev = &pdev->dev;
344 struct regmap_config pmu_regmcfg;
345 struct regmap *regmap;

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366 if (pmu_context->pmu_data && pmu_context->pmu_data->pmu_secure) {
367 pmu_regmcfg = regmap_smccfg;
368 pmu_regmcfg.max_register = resource_size(res) -
369 pmu_regmcfg.reg_stride;
370 /* Need physical address for SMC call */
371 regmap = devm_regmap_init(dev, NULL,
372 (void *)(uintptr_t)res->start,
373 &pmu_regmcfg);
309}
310EXPORT_SYMBOL_GPL(exynos_get_pmu_regmap_by_phandle);
311
312static int exynos_pmu_probe(struct platform_device *pdev)
313{
314 struct device *dev = &pdev->dev;
315 struct regmap_config pmu_regmcfg;
316 struct regmap *regmap;

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337 if (pmu_context->pmu_data && pmu_context->pmu_data->pmu_secure) {
338 pmu_regmcfg = regmap_smccfg;
339 pmu_regmcfg.max_register = resource_size(res) -
340 pmu_regmcfg.reg_stride;
341 /* Need physical address for SMC call */
342 regmap = devm_regmap_init(dev, NULL,
343 (void *)(uintptr_t)res->start,
344 &pmu_regmcfg);
345
346 if (IS_ERR(regmap))
347 return dev_err_probe(&pdev->dev, PTR_ERR(regmap),
348 "regmap init failed\n");
349
350 ret = of_syscon_register_regmap(dev->of_node, regmap);
351 if (ret)
352 return ret;
374 } else {
353 } else {
375 /* All other SoCs use a MMIO regmap */
376 pmu_regmcfg = regmap_mmiocfg;
377 pmu_regmcfg.max_register = resource_size(res) -
378 pmu_regmcfg.reg_stride;
379 regmap = devm_regmap_init_mmio(dev, pmu_base_addr,
380 &pmu_regmcfg);
354 /* let syscon create mmio regmap */
355 regmap = syscon_node_to_regmap(dev->of_node);
356 if (IS_ERR(regmap))
357 return dev_err_probe(&pdev->dev, PTR_ERR(regmap),
358 "syscon_node_to_regmap failed\n");
381 }
382
359 }
360
383 if (IS_ERR(regmap))
384 return dev_err_probe(&pdev->dev, PTR_ERR(regmap),
385 "regmap init failed\n");
386
387 pmu_context->pmureg = regmap;
388 pmu_context->dev = dev;
389
390 if (pmu_context->pmu_data && pmu_context->pmu_data->pmu_init)
391 pmu_context->pmu_data->pmu_init();
392
393 platform_set_drvdata(pdev, pmu_context);
394

--- 26 unchanged lines hidden --- 		361 pmu_context->pmureg = regmap;
362 pmu_context->dev = dev;
363
364 if (pmu_context->pmu_data && pmu_context->pmu_data->pmu_init)
365 pmu_context->pmu_data->pmu_init();
366
367 platform_set_drvdata(pdev, pmu_context);
368

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