mpi3mr.h (b3bbcc5d1da1b654091dad15980b3d58fdae0fc6) | mpi3mr.h (f2a79d2030ad9055e58f5b617f655fa5e270a57c) |
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1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Driver for Broadcom MPI3 Storage Controllers 4 * 5 * Copyright (C) 2017-2022 Broadcom Inc. 6 * (mailto: mpi3mr-linuxdrv.pdl@broadcom.com) 7 * 8 */ --- 25 unchanged lines hidden (view full) --- 34#include <asm/unaligned.h> 35#include <scsi/scsi.h> 36#include <scsi/scsi_cmnd.h> 37#include <scsi/scsi_dbg.h> 38#include <scsi/scsi_device.h> 39#include <scsi/scsi_host.h> 40#include <scsi/scsi_tcq.h> 41#include <uapi/scsi/scsi_bsg_mpi3mr.h> | 1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Driver for Broadcom MPI3 Storage Controllers 4 * 5 * Copyright (C) 2017-2022 Broadcom Inc. 6 * (mailto: mpi3mr-linuxdrv.pdl@broadcom.com) 7 * 8 */ --- 25 unchanged lines hidden (view full) --- 34#include <asm/unaligned.h> 35#include <scsi/scsi.h> 36#include <scsi/scsi_cmnd.h> 37#include <scsi/scsi_dbg.h> 38#include <scsi/scsi_device.h> 39#include <scsi/scsi_host.h> 40#include <scsi/scsi_tcq.h> 41#include <uapi/scsi/scsi_bsg_mpi3mr.h> |
42#include <scsi/scsi_transport_sas.h> |
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42 43#include "mpi/mpi30_transport.h" 44#include "mpi/mpi30_cnfg.h" 45#include "mpi/mpi30_image.h" 46#include "mpi/mpi30_init.h" 47#include "mpi/mpi30_ioc.h" 48#include "mpi/mpi30_sas.h" 49#include "mpi/mpi30_pci.h" --- 42 unchanged lines hidden (view full) --- 92 93/* Reserved Host Tag definitions */ 94#define MPI3MR_HOSTTAG_INVALID 0xFFFF 95#define MPI3MR_HOSTTAG_INITCMDS 1 96#define MPI3MR_HOSTTAG_BSG_CMDS 2 97#define MPI3MR_HOSTTAG_PEL_ABORT 3 98#define MPI3MR_HOSTTAG_PEL_WAIT 4 99#define MPI3MR_HOSTTAG_BLK_TMS 5 | 43 44#include "mpi/mpi30_transport.h" 45#include "mpi/mpi30_cnfg.h" 46#include "mpi/mpi30_image.h" 47#include "mpi/mpi30_init.h" 48#include "mpi/mpi30_ioc.h" 49#include "mpi/mpi30_sas.h" 50#include "mpi/mpi30_pci.h" --- 42 unchanged lines hidden (view full) --- 93 94/* Reserved Host Tag definitions */ 95#define MPI3MR_HOSTTAG_INVALID 0xFFFF 96#define MPI3MR_HOSTTAG_INITCMDS 1 97#define MPI3MR_HOSTTAG_BSG_CMDS 2 98#define MPI3MR_HOSTTAG_PEL_ABORT 3 99#define MPI3MR_HOSTTAG_PEL_WAIT 4 100#define MPI3MR_HOSTTAG_BLK_TMS 5 |
101#define MPI3MR_HOSTTAG_CFG_CMDS 6 102#define MPI3MR_HOSTTAG_TRANSPORT_CMDS 7 |
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100 101#define MPI3MR_NUM_DEVRMCMD 16 | 103 104#define MPI3MR_NUM_DEVRMCMD 16 |
102#define MPI3MR_HOSTTAG_DEVRMCMD_MIN (MPI3MR_HOSTTAG_BLK_TMS + 1) | 105#define MPI3MR_HOSTTAG_DEVRMCMD_MIN (MPI3MR_HOSTTAG_TRANSPORT_CMDS + 1) |
103#define MPI3MR_HOSTTAG_DEVRMCMD_MAX (MPI3MR_HOSTTAG_DEVRMCMD_MIN + \ 104 MPI3MR_NUM_DEVRMCMD - 1) 105 106#define MPI3MR_INTERNAL_CMDS_RESVD MPI3MR_HOSTTAG_DEVRMCMD_MAX 107#define MPI3MR_NUM_EVTACKCMD 4 108#define MPI3MR_HOSTTAG_EVTACKCMD_MIN (MPI3MR_HOSTTAG_DEVRMCMD_MAX + 1) 109#define MPI3MR_HOSTTAG_EVTACKCMD_MAX (MPI3MR_HOSTTAG_EVTACKCMD_MIN + \ 110 MPI3MR_NUM_EVTACKCMD - 1) 111 112/* Reduced resource count definition for crash kernel */ 113#define MPI3MR_HOST_IOS_KDUMP 128 114 115/* command/controller interaction timeout definitions in seconds */ 116#define MPI3MR_INTADMCMD_TIMEOUT 60 117#define MPI3MR_PORTENABLE_TIMEOUT 300 | 106#define MPI3MR_HOSTTAG_DEVRMCMD_MAX (MPI3MR_HOSTTAG_DEVRMCMD_MIN + \ 107 MPI3MR_NUM_DEVRMCMD - 1) 108 109#define MPI3MR_INTERNAL_CMDS_RESVD MPI3MR_HOSTTAG_DEVRMCMD_MAX 110#define MPI3MR_NUM_EVTACKCMD 4 111#define MPI3MR_HOSTTAG_EVTACKCMD_MIN (MPI3MR_HOSTTAG_DEVRMCMD_MAX + 1) 112#define MPI3MR_HOSTTAG_EVTACKCMD_MAX (MPI3MR_HOSTTAG_EVTACKCMD_MIN + \ 113 MPI3MR_NUM_EVTACKCMD - 1) 114 115/* Reduced resource count definition for crash kernel */ 116#define MPI3MR_HOST_IOS_KDUMP 128 117 118/* command/controller interaction timeout definitions in seconds */ 119#define MPI3MR_INTADMCMD_TIMEOUT 60 120#define MPI3MR_PORTENABLE_TIMEOUT 300 |
121#define MPI3MR_PORTENABLE_POLL_INTERVAL 5 |
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118#define MPI3MR_ABORTTM_TIMEOUT 60 119#define MPI3MR_RESETTM_TIMEOUT 60 120#define MPI3MR_RESET_HOST_IOWAIT_TIMEOUT 5 121#define MPI3MR_TSUPDATE_INTERVAL 900 122#define MPI3MR_DEFAULT_SHUTDOWN_TIME 120 123#define MPI3MR_RAID_ERRREC_RESET_TIMEOUT 180 124#define MPI3MR_PREPARE_FOR_RESET_TIMEOUT 180 125#define MPI3MR_RESET_ACK_TIMEOUT 30 126 127#define MPI3MR_WATCHDOG_INTERVAL 1000 /* in milli seconds */ 128 | 122#define MPI3MR_ABORTTM_TIMEOUT 60 123#define MPI3MR_RESETTM_TIMEOUT 60 124#define MPI3MR_RESET_HOST_IOWAIT_TIMEOUT 5 125#define MPI3MR_TSUPDATE_INTERVAL 900 126#define MPI3MR_DEFAULT_SHUTDOWN_TIME 120 127#define MPI3MR_RAID_ERRREC_RESET_TIMEOUT 180 128#define MPI3MR_PREPARE_FOR_RESET_TIMEOUT 180 129#define MPI3MR_RESET_ACK_TIMEOUT 30 130 131#define MPI3MR_WATCHDOG_INTERVAL 1000 /* in milli seconds */ 132 |
133#define MPI3MR_DEFAULT_CFG_PAGE_SZ 1024 /* in bytes */ 134 |
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129#define MPI3MR_SCMD_TIMEOUT (60 * HZ) 130#define MPI3MR_EH_SCMD_TIMEOUT (60 * HZ) 131 132/* Internal admin command state definitions*/ 133#define MPI3MR_CMD_NOTUSED 0x8000 134#define MPI3MR_CMD_COMPLETE 0x0001 135#define MPI3MR_CMD_PENDING 0x0002 136#define MPI3MR_CMD_REPLY_VALID 0x0004 --- 132 unchanged lines hidden (view full) --- 269 MPI3MR_RESET_FROM_EVTNOTIFY_TIMEOUT = 18, 270 MPI3MR_RESET_FROM_EVTACK_TIMEOUT = 19, 271 MPI3MR_RESET_FROM_CIACTVRST_TIMER = 20, 272 MPI3MR_RESET_FROM_GETPKGVER_TIMEOUT = 21, 273 MPI3MR_RESET_FROM_PELABORT_TIMEOUT = 22, 274 MPI3MR_RESET_FROM_SYSFS = 23, 275 MPI3MR_RESET_FROM_SYSFS_TIMEOUT = 24, 276 MPI3MR_RESET_FROM_FIRMWARE = 27, | 135#define MPI3MR_SCMD_TIMEOUT (60 * HZ) 136#define MPI3MR_EH_SCMD_TIMEOUT (60 * HZ) 137 138/* Internal admin command state definitions*/ 139#define MPI3MR_CMD_NOTUSED 0x8000 140#define MPI3MR_CMD_COMPLETE 0x0001 141#define MPI3MR_CMD_PENDING 0x0002 142#define MPI3MR_CMD_REPLY_VALID 0x0004 --- 132 unchanged lines hidden (view full) --- 275 MPI3MR_RESET_FROM_EVTNOTIFY_TIMEOUT = 18, 276 MPI3MR_RESET_FROM_EVTACK_TIMEOUT = 19, 277 MPI3MR_RESET_FROM_CIACTVRST_TIMER = 20, 278 MPI3MR_RESET_FROM_GETPKGVER_TIMEOUT = 21, 279 MPI3MR_RESET_FROM_PELABORT_TIMEOUT = 22, 280 MPI3MR_RESET_FROM_SYSFS = 23, 281 MPI3MR_RESET_FROM_SYSFS_TIMEOUT = 24, 282 MPI3MR_RESET_FROM_FIRMWARE = 27, |
283 MPI3MR_RESET_FROM_CFG_REQ_TIMEOUT = 29, 284 MPI3MR_RESET_FROM_SAS_TRANSPORT_TIMEOUT = 30, |
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277}; 278 279/* Queue type definitions */ 280enum queue_type { 281 MPI3MR_DEFAULT_QUEUE = 0, 282 MPI3MR_POLL_QUEUE, 283}; 284 --- 167 unchanged lines hidden (view full) --- 452 u16 fw_qd; 453 u16 modified_qd; 454 u16 id; 455 u32 high; 456 u32 low; 457 atomic_t pend_large_data_sz; 458}; 459 | 285}; 286 287/* Queue type definitions */ 288enum queue_type { 289 MPI3MR_DEFAULT_QUEUE = 0, 290 MPI3MR_POLL_QUEUE, 291}; 292 --- 167 unchanged lines hidden (view full) --- 460 u16 fw_qd; 461 u16 modified_qd; 462 u16 id; 463 u32 high; 464 u32 low; 465 atomic_t pend_large_data_sz; 466}; 467 |
468/* HBA port flags */ 469#define MPI3MR_HBA_PORT_FLAG_DIRTY 0x01 470 |
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460/** | 471/** |
472 * struct mpi3mr_hba_port - HBA's port information 473 * @port_id: Port number 474 * @flags: HBA port flags 475 */ 476struct mpi3mr_hba_port { 477 struct list_head list; 478 u8 port_id; 479 u8 flags; 480}; 481 482/** 483 * struct mpi3mr_sas_port - Internal SAS port information 484 * @port_list: List of ports belonging to a SAS node 485 * @num_phys: Number of phys associated with port 486 * @marked_responding: used while refresing the sas ports 487 * @lowest_phy: lowest phy ID of current sas port 488 * @phy_mask: phy_mask of current sas port 489 * @hba_port: HBA port entry 490 * @remote_identify: Attached device identification 491 * @rphy: SAS transport layer rphy object 492 * @port: SAS transport layer port object 493 * @phy_list: mpi3mr_sas_phy objects belonging to this port 494 */ 495struct mpi3mr_sas_port { 496 struct list_head port_list; 497 u8 num_phys; 498 u8 marked_responding; 499 int lowest_phy; 500 u32 phy_mask; 501 struct mpi3mr_hba_port *hba_port; 502 struct sas_identify remote_identify; 503 struct sas_rphy *rphy; 504 struct sas_port *port; 505 struct list_head phy_list; 506}; 507 508/** 509 * struct mpi3mr_sas_phy - Internal SAS Phy information 510 * @port_siblings: List of phys belonging to a port 511 * @identify: Phy identification 512 * @remote_identify: Attached device identification 513 * @phy: SAS transport layer Phy object 514 * @phy_id: Unique phy id within a port 515 * @handle: Firmware device handle for this phy 516 * @attached_handle: Firmware device handle for attached device 517 * @phy_belongs_to_port: Flag to indicate phy belongs to port 518 @hba_port: HBA port entry 519 */ 520struct mpi3mr_sas_phy { 521 struct list_head port_siblings; 522 struct sas_identify identify; 523 struct sas_identify remote_identify; 524 struct sas_phy *phy; 525 u8 phy_id; 526 u16 handle; 527 u16 attached_handle; 528 u8 phy_belongs_to_port; 529 struct mpi3mr_hba_port *hba_port; 530}; 531 532/** 533 * struct mpi3mr_sas_node - SAS host/expander information 534 * @list: List of sas nodes in a controller 535 * @parent_dev: Parent device class 536 * @num_phys: Number phys belonging to sas_node 537 * @sas_address: SAS address of sas_node 538 * @handle: Firmware device handle for this sas_host/expander 539 * @sas_address_parent: SAS address of parent expander or host 540 * @enclosure_handle: Firmware handle of enclosure of this node 541 * @device_info: Capabilities of this sas_host/expander 542 * @non_responding: used to refresh the expander devices during reset 543 * @host_node: Flag to indicate this is a host_node 544 * @hba_port: HBA port entry 545 * @phy: A list of phys that make up this sas_host/expander 546 * @sas_port_list: List of internal ports of this node 547 * @rphy: sas_rphy object of this expander node 548 */ 549struct mpi3mr_sas_node { 550 struct list_head list; 551 struct device *parent_dev; 552 u8 num_phys; 553 u64 sas_address; 554 u16 handle; 555 u64 sas_address_parent; 556 u16 enclosure_handle; 557 u64 enclosure_logical_id; 558 u8 non_responding; 559 u8 host_node; 560 struct mpi3mr_hba_port *hba_port; 561 struct mpi3mr_sas_phy *phy; 562 struct list_head sas_port_list; 563 struct sas_rphy *rphy; 564}; 565 566/** 567 * struct mpi3mr_enclosure_node - enclosure information 568 * @list: List of enclosures 569 * @pg0: Enclosure page 0; 570 */ 571struct mpi3mr_enclosure_node { 572 struct list_head list; 573 struct mpi3_enclosure_page0 pg0; 574}; 575 576/** |
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461 * struct tgt_dev_sas_sata - SAS/SATA device specific 462 * information cached from firmware given data 463 * 464 * @sas_address: World wide unique SAS address | 577 * struct tgt_dev_sas_sata - SAS/SATA device specific 578 * information cached from firmware given data 579 * 580 * @sas_address: World wide unique SAS address |
581 * @sas_address_parent: Sas address of parent expander or host |
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465 * @dev_info: Device information bits | 582 * @dev_info: Device information bits |
583 * @phy_id: Phy identifier provided in device page 0 584 * @attached_phy_id: Attached phy identifier provided in device page 0 585 * @sas_transport_attached: Is this device exposed to transport 586 * @pend_sas_rphy_add: Flag to check device is in process of add 587 * @hba_port: HBA port entry 588 * @rphy: SAS transport layer rphy object |
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466 */ 467struct tgt_dev_sas_sata { 468 u64 sas_address; | 589 */ 590struct tgt_dev_sas_sata { 591 u64 sas_address; |
592 u64 sas_address_parent; |
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469 u16 dev_info; | 593 u16 dev_info; |
594 u8 phy_id; 595 u8 attached_phy_id; 596 u8 sas_transport_attached; 597 u8 pend_sas_rphy_add; 598 struct mpi3mr_hba_port *hba_port; 599 struct sas_rphy *rphy; |
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470}; 471 472/** 473 * struct tgt_dev_pcie - PCIe device specific information cached 474 * from firmware given data 475 * 476 * @mdts: Maximum data transfer size 477 * @capb: Device capabilities --- 48 unchanged lines hidden (view full) --- 526 * 527 * @list: List pointer 528 * @starget: Scsi_target pointer 529 * @dev_handle: FW device handle 530 * @parent_handle: FW parent device handle 531 * @slot: Slot number 532 * @encl_handle: FW enclosure handle 533 * @perst_id: FW assigned Persistent ID | 600}; 601 602/** 603 * struct tgt_dev_pcie - PCIe device specific information cached 604 * from firmware given data 605 * 606 * @mdts: Maximum data transfer size 607 * @capb: Device capabilities --- 48 unchanged lines hidden (view full) --- 656 * 657 * @list: List pointer 658 * @starget: Scsi_target pointer 659 * @dev_handle: FW device handle 660 * @parent_handle: FW parent device handle 661 * @slot: Slot number 662 * @encl_handle: FW enclosure handle 663 * @perst_id: FW assigned Persistent ID |
664 * @devpg0_flag: Device Page0 flag |
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534 * @dev_type: SAS/SATA/PCIE device type 535 * @is_hidden: Should be exposed to upper layers or not 536 * @host_exposed: Already exposed to host or not | 665 * @dev_type: SAS/SATA/PCIE device type 666 * @is_hidden: Should be exposed to upper layers or not 667 * @host_exposed: Already exposed to host or not |
668 * @io_unit_port: IO Unit port ID 669 * @non_stl: Is this device not to be attached with SAS TL |
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537 * @io_throttle_enabled: I/O throttling needed or not 538 * @q_depth: Device specific Queue Depth 539 * @wwid: World wide ID | 670 * @io_throttle_enabled: I/O throttling needed or not 671 * @q_depth: Device specific Queue Depth 672 * @wwid: World wide ID |
673 * @enclosure_logical_id: Enclosure logical identifier |
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540 * @dev_spec: Device type specific information 541 * @ref_count: Reference count 542 */ 543struct mpi3mr_tgt_dev { 544 struct list_head list; 545 struct scsi_target *starget; 546 u16 dev_handle; 547 u16 parent_handle; 548 u16 slot; 549 u16 encl_handle; 550 u16 perst_id; | 674 * @dev_spec: Device type specific information 675 * @ref_count: Reference count 676 */ 677struct mpi3mr_tgt_dev { 678 struct list_head list; 679 struct scsi_target *starget; 680 u16 dev_handle; 681 u16 parent_handle; 682 u16 slot; 683 u16 encl_handle; 684 u16 perst_id; |
685 u16 devpg0_flag; |
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551 u8 dev_type; 552 u8 is_hidden; 553 u8 host_exposed; | 686 u8 dev_type; 687 u8 is_hidden; 688 u8 host_exposed; |
689 u8 io_unit_port; 690 u8 non_stl; |
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554 u8 io_throttle_enabled; 555 u16 q_depth; 556 u64 wwid; | 691 u8 io_throttle_enabled; 692 u16 q_depth; 693 u64 wwid; |
694 u64 enclosure_logical_id; |
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557 union _form_spec_inf dev_spec; 558 struct kref ref_count; 559}; 560 561/** 562 * mpi3mr_tgtdev_get - k reference incrementor 563 * @s: Target device reference 564 * --- 109 unchanged lines hidden (view full) --- 674 u8 is_sense; 675 u8 retry_count; 676 u16 host_tag; 677 678 void (*callback)(struct mpi3mr_ioc *mrioc, 679 struct mpi3mr_drv_cmd *drv_cmd); 680}; 681 | 695 union _form_spec_inf dev_spec; 696 struct kref ref_count; 697}; 698 699/** 700 * mpi3mr_tgtdev_get - k reference incrementor 701 * @s: Target device reference 702 * --- 109 unchanged lines hidden (view full) --- 812 u8 is_sense; 813 u8 retry_count; 814 u16 host_tag; 815 816 void (*callback)(struct mpi3mr_ioc *mrioc, 817 struct mpi3mr_drv_cmd *drv_cmd); 818}; 819 |
820/** 821 * struct dma_memory_desc - memory descriptor structure to store 822 * virtual address, dma address and size for any generic dma 823 * memory allocations in the driver. 824 * 825 * @size: buffer size 826 * @addr: virtual address 827 * @dma_addr: dma address 828 */ 829struct dma_memory_desc { 830 u32 size; 831 void *addr; 832 dma_addr_t dma_addr; 833}; |
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682 | 834 |
835 |
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683/** 684 * struct chain_element - memory descriptor structure to store 685 * virtual and dma addresses for chain elements. 686 * 687 * @addr: virtual address 688 * @dma_addr: dma address 689 */ 690struct chain_element { --- 60 unchanged lines hidden (view full) --- 751 * @intr_info_count: Number of interrupt cookies 752 * @is_intr_info_set: Flag to indicate intr info is setup 753 * @num_queues: Number of operational queues 754 * @num_op_req_q: Number of operational request queues 755 * @req_qinfo: Operational request queue info pointer 756 * @num_op_reply_q: Number of operational reply queues 757 * @op_reply_qinfo: Operational reply queue info pointer 758 * @init_cmds: Command tracker for initialization commands | 836/** 837 * struct chain_element - memory descriptor structure to store 838 * virtual and dma addresses for chain elements. 839 * 840 * @addr: virtual address 841 * @dma_addr: dma address 842 */ 843struct chain_element { --- 60 unchanged lines hidden (view full) --- 904 * @intr_info_count: Number of interrupt cookies 905 * @is_intr_info_set: Flag to indicate intr info is setup 906 * @num_queues: Number of operational queues 907 * @num_op_req_q: Number of operational request queues 908 * @req_qinfo: Operational request queue info pointer 909 * @num_op_reply_q: Number of operational reply queues 910 * @op_reply_qinfo: Operational reply queue info pointer 911 * @init_cmds: Command tracker for initialization commands |
912 * @cfg_cmds: Command tracker for configuration requests |
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759 * @facts: Cached IOC facts data 760 * @op_reply_desc_sz: Operational reply descriptor size 761 * @num_reply_bufs: Number of reply buffers allocated 762 * @reply_buf_pool: Reply buffer pool 763 * @reply_buf: Reply buffer base virtual address 764 * @reply_buf_dma: Reply buffer DMA address 765 * @reply_buf_dma_max_address: Reply DMA address max limit 766 * @reply_free_qsz: Reply free queue size --- 20 unchanged lines hidden (view full) --- 787 * @watchdog_work_q_name: Fault watchdog worker thread name 788 * @watchdog_work_q: Fault watchdog worker thread 789 * @watchdog_work: Fault watchdog work 790 * @watchdog_lock: Fault watchdog lock 791 * @is_driver_loading: Is driver still loading 792 * @scan_started: Async scan started 793 * @scan_failed: Asycn scan failed 794 * @stop_drv_processing: Stop all command processing | 913 * @facts: Cached IOC facts data 914 * @op_reply_desc_sz: Operational reply descriptor size 915 * @num_reply_bufs: Number of reply buffers allocated 916 * @reply_buf_pool: Reply buffer pool 917 * @reply_buf: Reply buffer base virtual address 918 * @reply_buf_dma: Reply buffer DMA address 919 * @reply_buf_dma_max_address: Reply DMA address max limit 920 * @reply_free_qsz: Reply free queue size --- 20 unchanged lines hidden (view full) --- 941 * @watchdog_work_q_name: Fault watchdog worker thread name 942 * @watchdog_work_q: Fault watchdog worker thread 943 * @watchdog_work: Fault watchdog work 944 * @watchdog_lock: Fault watchdog lock 945 * @is_driver_loading: Is driver still loading 946 * @scan_started: Async scan started 947 * @scan_failed: Asycn scan failed 948 * @stop_drv_processing: Stop all command processing |
949 * @device_refresh_on: Don't process the events until devices are refreshed |
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795 * @max_host_ios: Maximum host I/O count 796 * @chain_buf_count: Chain buffer count 797 * @chain_buf_pool: Chain buffer pool 798 * @chain_sgl_list: Chain SGL list 799 * @chain_bitmap_sz: Chain buffer allocator bitmap size 800 * @chain_bitmap: Chain buffer allocator bitmap 801 * @chain_buf_lock: Chain buffer list lock 802 * @bsg_cmds: Command tracker for BSG command --- 46 unchanged lines hidden (view full) --- 849 * @logdata_buf_idx: Index of entry in buffer to store 850 * @logdata_entry_sz: log data entry size 851 * @pend_large_data_sz: Counter to track pending large data 852 * @io_throttle_data_length: I/O size to track in 512b blocks 853 * @io_throttle_high: I/O size to start throttle in 512b blocks 854 * @io_throttle_low: I/O size to stop throttle in 512b blocks 855 * @num_io_throttle_group: Maximum number of throttle groups 856 * @throttle_groups: Pointer to throttle group info structures | 950 * @max_host_ios: Maximum host I/O count 951 * @chain_buf_count: Chain buffer count 952 * @chain_buf_pool: Chain buffer pool 953 * @chain_sgl_list: Chain SGL list 954 * @chain_bitmap_sz: Chain buffer allocator bitmap size 955 * @chain_bitmap: Chain buffer allocator bitmap 956 * @chain_buf_lock: Chain buffer list lock 957 * @bsg_cmds: Command tracker for BSG command --- 46 unchanged lines hidden (view full) --- 1004 * @logdata_buf_idx: Index of entry in buffer to store 1005 * @logdata_entry_sz: log data entry size 1006 * @pend_large_data_sz: Counter to track pending large data 1007 * @io_throttle_data_length: I/O size to track in 512b blocks 1008 * @io_throttle_high: I/O size to start throttle in 512b blocks 1009 * @io_throttle_low: I/O size to stop throttle in 512b blocks 1010 * @num_io_throttle_group: Maximum number of throttle groups 1011 * @throttle_groups: Pointer to throttle group info structures |
1012 * @cfg_page: Default memory for configuration pages 1013 * @cfg_page_dma: Configuration page DMA address 1014 * @cfg_page_sz: Default configuration page memory size 1015 * @sas_transport_enabled: SAS transport enabled or not 1016 * @scsi_device_channel: Channel ID for SCSI devices 1017 * @transport_cmds: Command tracker for SAS transport commands 1018 * @sas_hba: SAS node for the controller 1019 * @sas_expander_list: SAS node list of expanders 1020 * @sas_node_lock: Lock to protect SAS node list 1021 * @hba_port_table_list: List of HBA Ports 1022 * @enclosure_list: List of Enclosure objects |
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857 */ 858struct mpi3mr_ioc { 859 struct list_head list; 860 struct pci_dev *pdev; 861 struct Scsi_Host *shost; 862 u8 id; 863 int cpu_count; 864 bool enable_segqueue; --- 34 unchanged lines hidden (view full) --- 899 u16 num_queues; 900 u16 num_op_req_q; 901 struct op_req_qinfo *req_qinfo; 902 903 u16 num_op_reply_q; 904 struct op_reply_qinfo *op_reply_qinfo; 905 906 struct mpi3mr_drv_cmd init_cmds; | 1023 */ 1024struct mpi3mr_ioc { 1025 struct list_head list; 1026 struct pci_dev *pdev; 1027 struct Scsi_Host *shost; 1028 u8 id; 1029 int cpu_count; 1030 bool enable_segqueue; --- 34 unchanged lines hidden (view full) --- 1065 u16 num_queues; 1066 u16 num_op_req_q; 1067 struct op_req_qinfo *req_qinfo; 1068 1069 u16 num_op_reply_q; 1070 struct op_reply_qinfo *op_reply_qinfo; 1071 1072 struct mpi3mr_drv_cmd init_cmds; |
1073 struct mpi3mr_drv_cmd cfg_cmds; |
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907 struct mpi3mr_ioc_facts facts; 908 u16 op_reply_desc_sz; 909 910 u32 num_reply_bufs; 911 struct dma_pool *reply_buf_pool; 912 u8 *reply_buf; 913 dma_addr_t reply_buf_dma; 914 dma_addr_t reply_buf_dma_max_address; --- 28 unchanged lines hidden (view full) --- 943 struct workqueue_struct *watchdog_work_q; 944 struct delayed_work watchdog_work; 945 spinlock_t watchdog_lock; 946 947 u8 is_driver_loading; 948 u8 scan_started; 949 u16 scan_failed; 950 u8 stop_drv_processing; | 1074 struct mpi3mr_ioc_facts facts; 1075 u16 op_reply_desc_sz; 1076 1077 u32 num_reply_bufs; 1078 struct dma_pool *reply_buf_pool; 1079 u8 *reply_buf; 1080 dma_addr_t reply_buf_dma; 1081 dma_addr_t reply_buf_dma_max_address; --- 28 unchanged lines hidden (view full) --- 1110 struct workqueue_struct *watchdog_work_q; 1111 struct delayed_work watchdog_work; 1112 spinlock_t watchdog_lock; 1113 1114 u8 is_driver_loading; 1115 u8 scan_started; 1116 u16 scan_failed; 1117 u8 stop_drv_processing; |
1118 u8 device_refresh_on; |
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951 952 u16 max_host_ios; 953 spinlock_t tgtdev_lock; 954 struct list_head tgtdev_list; 955 956 u32 chain_buf_count; 957 struct dma_pool *chain_buf_pool; 958 struct chain_element *chain_sgl_list; --- 61 unchanged lines hidden (view full) --- 1020 u16 logdata_entry_sz; 1021 1022 atomic_t pend_large_data_sz; 1023 u32 io_throttle_data_length; 1024 u32 io_throttle_high; 1025 u32 io_throttle_low; 1026 u16 num_io_throttle_group; 1027 struct mpi3mr_throttle_group_info *throttle_groups; | 1119 1120 u16 max_host_ios; 1121 spinlock_t tgtdev_lock; 1122 struct list_head tgtdev_list; 1123 1124 u32 chain_buf_count; 1125 struct dma_pool *chain_buf_pool; 1126 struct chain_element *chain_sgl_list; --- 61 unchanged lines hidden (view full) --- 1188 u16 logdata_entry_sz; 1189 1190 atomic_t pend_large_data_sz; 1191 u32 io_throttle_data_length; 1192 u32 io_throttle_high; 1193 u32 io_throttle_low; 1194 u16 num_io_throttle_group; 1195 struct mpi3mr_throttle_group_info *throttle_groups; |
1196 1197 void *cfg_page; 1198 dma_addr_t cfg_page_dma; 1199 u16 cfg_page_sz; 1200 1201 u8 sas_transport_enabled; 1202 u8 scsi_device_channel; 1203 struct mpi3mr_drv_cmd transport_cmds; 1204 struct mpi3mr_sas_node sas_hba; 1205 struct list_head sas_expander_list; 1206 spinlock_t sas_node_lock; 1207 struct list_head hba_port_table_list; 1208 struct list_head enclosure_list; |
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1028}; 1029 1030/** 1031 * struct mpi3mr_fwevt - Firmware event structure. 1032 * 1033 * @list: list head 1034 * @work: Work structure 1035 * @mrioc: Adapter instance reference --- 108 unchanged lines hidden (view full) --- 1144struct mpi3mr_tgt_dev *mpi3mr_get_tgtdev_by_handle( 1145 struct mpi3mr_ioc *mrioc, u16 handle); 1146void mpi3mr_pel_get_seqnum_complete(struct mpi3mr_ioc *mrioc, 1147 struct mpi3mr_drv_cmd *drv_cmd); 1148int mpi3mr_pel_get_seqnum_post(struct mpi3mr_ioc *mrioc, 1149 struct mpi3mr_drv_cmd *drv_cmd); 1150void mpi3mr_app_save_logdata(struct mpi3mr_ioc *mrioc, char *event_data, 1151 u16 event_data_size); | 1209}; 1210 1211/** 1212 * struct mpi3mr_fwevt - Firmware event structure. 1213 * 1214 * @list: list head 1215 * @work: Work structure 1216 * @mrioc: Adapter instance reference --- 108 unchanged lines hidden (view full) --- 1325struct mpi3mr_tgt_dev *mpi3mr_get_tgtdev_by_handle( 1326 struct mpi3mr_ioc *mrioc, u16 handle); 1327void mpi3mr_pel_get_seqnum_complete(struct mpi3mr_ioc *mrioc, 1328 struct mpi3mr_drv_cmd *drv_cmd); 1329int mpi3mr_pel_get_seqnum_post(struct mpi3mr_ioc *mrioc, 1330 struct mpi3mr_drv_cmd *drv_cmd); 1331void mpi3mr_app_save_logdata(struct mpi3mr_ioc *mrioc, char *event_data, 1332 u16 event_data_size); |
1333struct mpi3mr_enclosure_node *mpi3mr_enclosure_find_by_handle( 1334 struct mpi3mr_ioc *mrioc, u16 handle); |
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1152extern const struct attribute_group *mpi3mr_host_groups[]; 1153extern const struct attribute_group *mpi3mr_dev_groups[]; | 1335extern const struct attribute_group *mpi3mr_host_groups[]; 1336extern const struct attribute_group *mpi3mr_dev_groups[]; |
1337 1338extern struct sas_function_template mpi3mr_transport_functions; 1339extern struct scsi_transport_template *mpi3mr_transport_template; 1340 1341int mpi3mr_cfg_get_dev_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 1342 struct mpi3_device_page0 *dev_pg0, u16 pg_sz, u32 form, u32 form_spec); 1343int mpi3mr_cfg_get_sas_phy_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 1344 struct mpi3_sas_phy_page0 *phy_pg0, u16 pg_sz, u32 form, 1345 u32 form_spec); 1346int mpi3mr_cfg_get_sas_phy_pg1(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 1347 struct mpi3_sas_phy_page1 *phy_pg1, u16 pg_sz, u32 form, 1348 u32 form_spec); 1349int mpi3mr_cfg_get_sas_exp_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 1350 struct mpi3_sas_expander_page0 *exp_pg0, u16 pg_sz, u32 form, 1351 u32 form_spec); 1352int mpi3mr_cfg_get_sas_exp_pg1(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 1353 struct mpi3_sas_expander_page1 *exp_pg1, u16 pg_sz, u32 form, 1354 u32 form_spec); 1355int mpi3mr_cfg_get_enclosure_pg0(struct mpi3mr_ioc *mrioc, u16 *ioc_status, 1356 struct mpi3_enclosure_page0 *encl_pg0, u16 pg_sz, u32 form, 1357 u32 form_spec); 1358int mpi3mr_cfg_get_sas_io_unit_pg0(struct mpi3mr_ioc *mrioc, 1359 struct mpi3_sas_io_unit_page0 *sas_io_unit_pg0, u16 pg_sz); 1360int mpi3mr_cfg_get_sas_io_unit_pg1(struct mpi3mr_ioc *mrioc, 1361 struct mpi3_sas_io_unit_page1 *sas_io_unit_pg1, u16 pg_sz); 1362int mpi3mr_cfg_set_sas_io_unit_pg1(struct mpi3mr_ioc *mrioc, 1363 struct mpi3_sas_io_unit_page1 *sas_io_unit_pg1, u16 pg_sz); 1364int mpi3mr_cfg_get_driver_pg1(struct mpi3mr_ioc *mrioc, 1365 struct mpi3_driver_page1 *driver_pg1, u16 pg_sz); 1366 1367u8 mpi3mr_is_expander_device(u16 device_info); 1368int mpi3mr_expander_add(struct mpi3mr_ioc *mrioc, u16 handle); 1369void mpi3mr_expander_remove(struct mpi3mr_ioc *mrioc, u64 sas_address, 1370 struct mpi3mr_hba_port *hba_port); 1371struct mpi3mr_sas_node *__mpi3mr_expander_find_by_handle(struct mpi3mr_ioc 1372 *mrioc, u16 handle); 1373struct mpi3mr_hba_port *mpi3mr_get_hba_port_by_id(struct mpi3mr_ioc *mrioc, 1374 u8 port_id); 1375void mpi3mr_sas_host_refresh(struct mpi3mr_ioc *mrioc); 1376void mpi3mr_sas_host_add(struct mpi3mr_ioc *mrioc); 1377void mpi3mr_update_links(struct mpi3mr_ioc *mrioc, 1378 u64 sas_address_parent, u16 handle, u8 phy_number, u8 link_rate, 1379 struct mpi3mr_hba_port *hba_port); 1380void mpi3mr_remove_tgtdev_from_host(struct mpi3mr_ioc *mrioc, 1381 struct mpi3mr_tgt_dev *tgtdev); 1382int mpi3mr_report_tgtdev_to_sas_transport(struct mpi3mr_ioc *mrioc, 1383 struct mpi3mr_tgt_dev *tgtdev); 1384void mpi3mr_remove_tgtdev_from_sas_transport(struct mpi3mr_ioc *mrioc, 1385 struct mpi3mr_tgt_dev *tgtdev); 1386struct mpi3mr_tgt_dev *__mpi3mr_get_tgtdev_by_addr_and_rphy( 1387 struct mpi3mr_ioc *mrioc, u64 sas_address, struct sas_rphy *rphy); 1388void mpi3mr_print_device_event_notice(struct mpi3mr_ioc *mrioc, 1389 bool device_add); 1390void mpi3mr_refresh_sas_ports(struct mpi3mr_ioc *mrioc); 1391void mpi3mr_refresh_expanders(struct mpi3mr_ioc *mrioc); 1392void mpi3mr_add_event_wait_for_device_refresh(struct mpi3mr_ioc *mrioc); 1393void mpi3mr_flush_drv_cmds(struct mpi3mr_ioc *mrioc); 1394void mpi3mr_flush_cmds_for_unrecovered_controller(struct mpi3mr_ioc *mrioc); |
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1154#endif /*MPI3MR_H_INCLUDED*/ | 1395#endif /*MPI3MR_H_INCLUDED*/ |