rtc-sa1100.c (5e2aa2ed08e2e280121dc7cf5609c87d464f12ef) rtc-sa1100.c (8c0961ba7c9356186a0606a391f08e2ecb491a57)
1/*
2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
3 *
4 * Copyright (c) 2000 Nils Faerber
5 *
6 * Based on rtc.c by Paul Gortmaker
7 *
8 * Original Driver by Nils Faerber <nils@kernelconcepts.de>

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37
38#include <mach/hardware.h>
39#include <mach/irqs.h>
40
41#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
42#include <mach/regs-rtc.h>
43#endif
44
1/*
2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
3 *
4 * Copyright (c) 2000 Nils Faerber
5 *
6 * Based on rtc.c by Paul Gortmaker
7 *
8 * Original Driver by Nils Faerber <nils@kernelconcepts.de>

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37
38#include <mach/hardware.h>
39#include <mach/irqs.h>
40
41#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
42#include <mach/regs-rtc.h>
43#endif
44
45#include "rtc-sa1100.h"
46
45#define RTC_DEF_DIVIDER (32768 - 1)
46#define RTC_DEF_TRIM 0
47#define RTC_FREQ 1024
48
47#define RTC_DEF_DIVIDER (32768 - 1)
48#define RTC_DEF_TRIM 0
49#define RTC_FREQ 1024
50
49struct sa1100_rtc {
50 spinlock_t lock;
51 int irq_1hz;
52 int irq_alarm;
53 struct rtc_device *rtc;
54 struct clk *clk;
55};
56
57static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
58{
59 struct sa1100_rtc *info = dev_get_drvdata(dev_id);
60 struct rtc_device *rtc = info->rtc;
61 unsigned int rtsr;
62 unsigned long events = 0;
63

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218 .read_time = sa1100_rtc_read_time,
219 .set_time = sa1100_rtc_set_time,
220 .read_alarm = sa1100_rtc_read_alarm,
221 .set_alarm = sa1100_rtc_set_alarm,
222 .proc = sa1100_rtc_proc,
223 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
224};
225
51
52static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
53{
54 struct sa1100_rtc *info = dev_get_drvdata(dev_id);
55 struct rtc_device *rtc = info->rtc;
56 unsigned int rtsr;
57 unsigned long events = 0;
58

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213 .read_time = sa1100_rtc_read_time,
214 .set_time = sa1100_rtc_set_time,
215 .read_alarm = sa1100_rtc_read_alarm,
216 .set_alarm = sa1100_rtc_set_alarm,
217 .proc = sa1100_rtc_proc,
218 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
219};
220
226static int sa1100_rtc_probe(struct platform_device *pdev)
221int sa1100_rtc_init(struct platform_device *pdev, struct sa1100_rtc *info)
227{
228 struct rtc_device *rtc;
222{
223 struct rtc_device *rtc;
229 struct sa1100_rtc *info;
230 int irq_1hz, irq_alarm, ret = 0;
224 int ret;
231
225
232 irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
233 irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
234 if (irq_1hz < 0 || irq_alarm < 0)
235 return -ENODEV;
226 spin_lock_init(&info->lock);
236
227
237 info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
238 if (!info)
239 return -ENOMEM;
240 info->clk = devm_clk_get(&pdev->dev, NULL);
241 if (IS_ERR(info->clk)) {
242 dev_err(&pdev->dev, "failed to find rtc clock source\n");
243 return PTR_ERR(info->clk);
244 }
228 info->clk = devm_clk_get(&pdev->dev, NULL);
229 if (IS_ERR(info->clk)) {
230 dev_err(&pdev->dev, "failed to find rtc clock source\n");
231 return PTR_ERR(info->clk);
232 }
245 info->irq_1hz = irq_1hz;
246 info->irq_alarm = irq_alarm;
247 spin_lock_init(&info->lock);
248 platform_set_drvdata(pdev, info);
249
250 ret = clk_prepare_enable(info->clk);
251 if (ret)
252 return ret;
253 /*
254 * According to the manual we should be able to let RTTR be zero
255 * and then a default diviser for a 32.768KHz clock is used.
256 * Apparently this doesn't work, at least for my SA1110 rev 5.
257 * If the clock divider is uninitialized then reset it to the
258 * default value to get the 1Hz clock.
259 */
260 if (RTTR == 0) {
261 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
262 dev_warn(&pdev->dev, "warning: "
263 "initializing default clock divider/trim value\n");
264 /* The current RTC value probably doesn't make sense either */
265 RCNR = 0;
266 }
267
233
234 ret = clk_prepare_enable(info->clk);
235 if (ret)
236 return ret;
237 /*
238 * According to the manual we should be able to let RTTR be zero
239 * and then a default diviser for a 32.768KHz clock is used.
240 * Apparently this doesn't work, at least for my SA1110 rev 5.
241 * If the clock divider is uninitialized then reset it to the
242 * default value to get the 1Hz clock.
243 */
244 if (RTTR == 0) {
245 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
246 dev_warn(&pdev->dev, "warning: "
247 "initializing default clock divider/trim value\n");
248 /* The current RTC value probably doesn't make sense either */
249 RCNR = 0;
250 }
251
268 device_init_wakeup(&pdev->dev, 1);
269
270 rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops,
271 THIS_MODULE);
252 rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops,
253 THIS_MODULE);
272
273 if (IS_ERR(rtc)) {
254 if (IS_ERR(rtc)) {
274 ret = PTR_ERR(rtc);
275 goto err_dev;
255 clk_disable_unprepare(info->clk);
256 return PTR_ERR(rtc);
276 }
277 info->rtc = rtc;
278
279 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
280 * See also the comments in sa1100_rtc_interrupt().
281 *
282 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
283 * interrupt pending, even though interrupts were never enabled.

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296 * initialization is unknown and could in principle happen during
297 * normal processing.
298 *
299 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
300 * the corresponding bits in RTSR. */
301 RTSR = RTSR_AL | RTSR_HZ;
302
303 return 0;
257 }
258 info->rtc = rtc;
259
260 /* Fix for a nasty initialization problem the in SA11xx RTSR register.
261 * See also the comments in sa1100_rtc_interrupt().
262 *
263 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
264 * interrupt pending, even though interrupts were never enabled.

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277 * initialization is unknown and could in principle happen during
278 * normal processing.
279 *
280 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
281 * the corresponding bits in RTSR. */
282 RTSR = RTSR_AL | RTSR_HZ;
283
284 return 0;
304err_dev:
305 clk_disable_unprepare(info->clk);
306 return ret;
307}
285}
286EXPORT_SYMBOL_GPL(sa1100_rtc_init);
308
287
288static int sa1100_rtc_probe(struct platform_device *pdev)
289{
290 struct sa1100_rtc *info;
291 int irq_1hz, irq_alarm;
292
293 irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
294 irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
295 if (irq_1hz < 0 || irq_alarm < 0)
296 return -ENODEV;
297
298 info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
299 if (!info)
300 return -ENOMEM;
301 info->irq_1hz = irq_1hz;
302 info->irq_alarm = irq_alarm;
303
304 platform_set_drvdata(pdev, info);
305 device_init_wakeup(&pdev->dev, 1);
306
307 return sa1100_rtc_init(pdev, info);
308}
309
309static int sa1100_rtc_remove(struct platform_device *pdev)
310{
311 struct sa1100_rtc *info = platform_get_drvdata(pdev);
312
313 if (info)
314 clk_disable_unprepare(info->clk);
315
316 return 0;

--- 48 unchanged lines hidden --- 		310static int sa1100_rtc_remove(struct platform_device *pdev)
311{
312 struct sa1100_rtc *info = platform_get_drvdata(pdev);
313
314 if (info)
315 clk_disable_unprepare(info->clk);
316
317 return 0;

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