cnqf.c (002c6ca75289a4ac4f6738213dd2d258704886e4) cnqf.c (19c8b5241425948daeb0f91fe7a07cf1a4b76239)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * AMD Platform Management Framework Driver
4 *
5 * Copyright (c) 2022, Advanced Micro Devices, Inc.
6 * All Rights Reserved.
7 *
8 * Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>

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153 config_store.current_mode, NULL);
154 }
155 break;
156 }
157 }
158 return 0;
159}
160
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * AMD Platform Management Framework Driver
4 *
5 * Copyright (c) 2022, Advanced Micro Devices, Inc.
6 * All Rights Reserved.
7 *
8 * Author: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>

--- 144 unchanged lines hidden (view full) ---

153 config_store.current_mode, NULL);
154 }
155 break;
156 }
157 }
158 return 0;
159}
160
161static void amd_pmf_update_trans_data(int idx, struct apmf_dyn_slider_output out)
161static void amd_pmf_update_trans_data(int idx, struct apmf_dyn_slider_output *out)
162{
163 struct cnqf_tran_params *tp;
164
165 tp = &config_store.trans_param[idx][CNQF_TRANSITION_TO_QUIET];
162{
163 struct cnqf_tran_params *tp;
164
165 tp = &config_store.trans_param[idx][CNQF_TRANSITION_TO_QUIET];
166 tp->time_constant = out.t_balanced_to_quiet;
166 tp->time_constant = out->t_balanced_to_quiet;
167 tp->target_mode = CNQF_MODE_QUIET;
168 tp->shifting_up = false;
169
170 tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_BALANCE_TO_PERFORMANCE];
167 tp->target_mode = CNQF_MODE_QUIET;
168 tp->shifting_up = false;
169
170 tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_BALANCE_TO_PERFORMANCE];
171 tp->time_constant = out.t_balanced_to_perf;
171 tp->time_constant = out->t_balanced_to_perf;
172 tp->target_mode = CNQF_MODE_PERFORMANCE;
173 tp->shifting_up = true;
174
175 tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_QUIET_TO_BALANCE];
172 tp->target_mode = CNQF_MODE_PERFORMANCE;
173 tp->shifting_up = true;
174
175 tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_QUIET_TO_BALANCE];
176 tp->time_constant = out.t_quiet_to_balanced;
176 tp->time_constant = out->t_quiet_to_balanced;
177 tp->target_mode = CNQF_MODE_BALANCE;
178 tp->shifting_up = true;
179
180 tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_PERFORMANCE_TO_BALANCE];
177 tp->target_mode = CNQF_MODE_BALANCE;
178 tp->shifting_up = true;
179
180 tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_PERFORMANCE_TO_BALANCE];
181 tp->time_constant = out.t_perf_to_balanced;
181 tp->time_constant = out->t_perf_to_balanced;
182 tp->target_mode = CNQF_MODE_BALANCE;
183 tp->shifting_up = false;
184
185 tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_TURBO_TO_PERFORMANCE];
182 tp->target_mode = CNQF_MODE_BALANCE;
183 tp->shifting_up = false;
184
185 tp = &config_store.trans_param[idx][CNQF_TRANSITION_FROM_TURBO_TO_PERFORMANCE];
186 tp->time_constant = out.t_turbo_to_perf;
186 tp->time_constant = out->t_turbo_to_perf;
187 tp->target_mode = CNQF_MODE_PERFORMANCE;
188 tp->shifting_up = false;
189
190 tp = &config_store.trans_param[idx][CNQF_TRANSITION_TO_TURBO];
187 tp->target_mode = CNQF_MODE_PERFORMANCE;
188 tp->shifting_up = false;
189
190 tp = &config_store.trans_param[idx][CNQF_TRANSITION_TO_TURBO];
191 tp->time_constant = out.t_perf_to_turbo;
191 tp->time_constant = out->t_perf_to_turbo;
192 tp->target_mode = CNQF_MODE_TURBO;
193 tp->shifting_up = true;
194}
195
192 tp->target_mode = CNQF_MODE_TURBO;
193 tp->shifting_up = true;
194}
195
196static void amd_pmf_update_mode_set(int idx, struct apmf_dyn_slider_output out)
196static void amd_pmf_update_mode_set(int idx, struct apmf_dyn_slider_output *out)
197{
198 struct cnqf_mode_settings *ms;
199
200 /* Quiet Mode */
201 ms = &config_store.mode_set[idx][CNQF_MODE_QUIET];
197{
198 struct cnqf_mode_settings *ms;
199
200 /* Quiet Mode */
201 ms = &config_store.mode_set[idx][CNQF_MODE_QUIET];
202 ms->power_floor = out.ps[APMF_CNQF_QUIET].pfloor;
203 ms->power_control.fppt = out.ps[APMF_CNQF_QUIET].fppt;
204 ms->power_control.sppt = out.ps[APMF_CNQF_QUIET].sppt;
205 ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_QUIET].sppt_apu_only;
206 ms->power_control.spl = out.ps[APMF_CNQF_QUIET].spl;
207 ms->power_control.stt_min = out.ps[APMF_CNQF_QUIET].stt_min_limit;
202 ms->power_floor = out->ps[APMF_CNQF_QUIET].pfloor;
203 ms->power_control.fppt = out->ps[APMF_CNQF_QUIET].fppt;
204 ms->power_control.sppt = out->ps[APMF_CNQF_QUIET].sppt;
205 ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_QUIET].sppt_apu_only;
206 ms->power_control.spl = out->ps[APMF_CNQF_QUIET].spl;
207 ms->power_control.stt_min = out->ps[APMF_CNQF_QUIET].stt_min_limit;
208 ms->power_control.stt_skin_temp[STT_TEMP_APU] =
208 ms->power_control.stt_skin_temp[STT_TEMP_APU] =
209 out.ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_APU];
209 out->ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_APU];
210 ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
210 ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
211 out.ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_HS2];
212 ms->fan_control.fan_id = out.ps[APMF_CNQF_QUIET].fan_id;
211 out->ps[APMF_CNQF_QUIET].stt_skintemp[STT_TEMP_HS2];
212 ms->fan_control.fan_id = out->ps[APMF_CNQF_QUIET].fan_id;
213
214 /* Balance Mode */
215 ms = &config_store.mode_set[idx][CNQF_MODE_BALANCE];
213
214 /* Balance Mode */
215 ms = &config_store.mode_set[idx][CNQF_MODE_BALANCE];
216 ms->power_floor = out.ps[APMF_CNQF_BALANCE].pfloor;
217 ms->power_control.fppt = out.ps[APMF_CNQF_BALANCE].fppt;
218 ms->power_control.sppt = out.ps[APMF_CNQF_BALANCE].sppt;
219 ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_BALANCE].sppt_apu_only;
220 ms->power_control.spl = out.ps[APMF_CNQF_BALANCE].spl;
221 ms->power_control.stt_min = out.ps[APMF_CNQF_BALANCE].stt_min_limit;
216 ms->power_floor = out->ps[APMF_CNQF_BALANCE].pfloor;
217 ms->power_control.fppt = out->ps[APMF_CNQF_BALANCE].fppt;
218 ms->power_control.sppt = out->ps[APMF_CNQF_BALANCE].sppt;
219 ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_BALANCE].sppt_apu_only;
220 ms->power_control.spl = out->ps[APMF_CNQF_BALANCE].spl;
221 ms->power_control.stt_min = out->ps[APMF_CNQF_BALANCE].stt_min_limit;
222 ms->power_control.stt_skin_temp[STT_TEMP_APU] =
222 ms->power_control.stt_skin_temp[STT_TEMP_APU] =
223 out.ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_APU];
223 out->ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_APU];
224 ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
224 ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
225 out.ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_HS2];
226 ms->fan_control.fan_id = out.ps[APMF_CNQF_BALANCE].fan_id;
225 out->ps[APMF_CNQF_BALANCE].stt_skintemp[STT_TEMP_HS2];
226 ms->fan_control.fan_id = out->ps[APMF_CNQF_BALANCE].fan_id;
227
228 /* Performance Mode */
229 ms = &config_store.mode_set[idx][CNQF_MODE_PERFORMANCE];
227
228 /* Performance Mode */
229 ms = &config_store.mode_set[idx][CNQF_MODE_PERFORMANCE];
230 ms->power_floor = out.ps[APMF_CNQF_PERFORMANCE].pfloor;
231 ms->power_control.fppt = out.ps[APMF_CNQF_PERFORMANCE].fppt;
232 ms->power_control.sppt = out.ps[APMF_CNQF_PERFORMANCE].sppt;
233 ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_PERFORMANCE].sppt_apu_only;
234 ms->power_control.spl = out.ps[APMF_CNQF_PERFORMANCE].spl;
235 ms->power_control.stt_min = out.ps[APMF_CNQF_PERFORMANCE].stt_min_limit;
230 ms->power_floor = out->ps[APMF_CNQF_PERFORMANCE].pfloor;
231 ms->power_control.fppt = out->ps[APMF_CNQF_PERFORMANCE].fppt;
232 ms->power_control.sppt = out->ps[APMF_CNQF_PERFORMANCE].sppt;
233 ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_PERFORMANCE].sppt_apu_only;
234 ms->power_control.spl = out->ps[APMF_CNQF_PERFORMANCE].spl;
235 ms->power_control.stt_min = out->ps[APMF_CNQF_PERFORMANCE].stt_min_limit;
236 ms->power_control.stt_skin_temp[STT_TEMP_APU] =
236 ms->power_control.stt_skin_temp[STT_TEMP_APU] =
237 out.ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_APU];
237 out->ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_APU];
238 ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
238 ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
239 out.ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_HS2];
240 ms->fan_control.fan_id = out.ps[APMF_CNQF_PERFORMANCE].fan_id;
239 out->ps[APMF_CNQF_PERFORMANCE].stt_skintemp[STT_TEMP_HS2];
240 ms->fan_control.fan_id = out->ps[APMF_CNQF_PERFORMANCE].fan_id;
241
242 /* Turbo Mode */
243 ms = &config_store.mode_set[idx][CNQF_MODE_TURBO];
241
242 /* Turbo Mode */
243 ms = &config_store.mode_set[idx][CNQF_MODE_TURBO];
244 ms->power_floor = out.ps[APMF_CNQF_TURBO].pfloor;
245 ms->power_control.fppt = out.ps[APMF_CNQF_TURBO].fppt;
246 ms->power_control.sppt = out.ps[APMF_CNQF_TURBO].sppt;
247 ms->power_control.sppt_apu_only = out.ps[APMF_CNQF_TURBO].sppt_apu_only;
248 ms->power_control.spl = out.ps[APMF_CNQF_TURBO].spl;
249 ms->power_control.stt_min = out.ps[APMF_CNQF_TURBO].stt_min_limit;
244 ms->power_floor = out->ps[APMF_CNQF_TURBO].pfloor;
245 ms->power_control.fppt = out->ps[APMF_CNQF_TURBO].fppt;
246 ms->power_control.sppt = out->ps[APMF_CNQF_TURBO].sppt;
247 ms->power_control.sppt_apu_only = out->ps[APMF_CNQF_TURBO].sppt_apu_only;
248 ms->power_control.spl = out->ps[APMF_CNQF_TURBO].spl;
249 ms->power_control.stt_min = out->ps[APMF_CNQF_TURBO].stt_min_limit;
250 ms->power_control.stt_skin_temp[STT_TEMP_APU] =
250 ms->power_control.stt_skin_temp[STT_TEMP_APU] =
251 out.ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_APU];
251 out->ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_APU];
252 ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
252 ms->power_control.stt_skin_temp[STT_TEMP_HS2] =
253 out.ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_HS2];
254 ms->fan_control.fan_id = out.ps[APMF_CNQF_TURBO].fan_id;
253 out->ps[APMF_CNQF_TURBO].stt_skintemp[STT_TEMP_HS2];
254 ms->fan_control.fan_id = out->ps[APMF_CNQF_TURBO].fan_id;
255}
256
257static int amd_pmf_check_flags(struct amd_pmf_dev *dev)
258{
259 struct apmf_dyn_slider_output out = {};
260
261 if (is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_AC))
262 apmf_get_dyn_slider_def_ac(dev, &out);

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279 ret = apmf_get_dyn_slider_def_ac(dev, &out);
280 else
281 ret = apmf_get_dyn_slider_def_dc(dev, &out);
282 if (ret) {
283 dev_err(dev->dev, "APMF apmf_get_dyn_slider_def_dc failed :%d\n", ret);
284 return ret;
285 }
286
255}
256
257static int amd_pmf_check_flags(struct amd_pmf_dev *dev)
258{
259 struct apmf_dyn_slider_output out = {};
260
261 if (is_apmf_func_supported(dev, APMF_FUNC_DYN_SLIDER_AC))
262 apmf_get_dyn_slider_def_ac(dev, &out);

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279 ret = apmf_get_dyn_slider_def_ac(dev, &out);
280 else
281 ret = apmf_get_dyn_slider_def_dc(dev, &out);
282 if (ret) {
283 dev_err(dev->dev, "APMF apmf_get_dyn_slider_def_dc failed :%d\n", ret);
284 return ret;
285 }
286
287 amd_pmf_update_mode_set(i, out);
288 amd_pmf_update_trans_data(i, out);
287 amd_pmf_update_mode_set(i, &out);
288 amd_pmf_update_trans_data(i, &out);
289 amd_pmf_update_power_threshold(i);
290
291 for (j = 0; j < CNQF_MODE_MAX; j++) {
292 if (config_store.mode_set[i][j].fan_control.fan_id == FAN_INDEX_AUTO)
293 config_store.mode_set[i][j].fan_control.manual = false;
294 else
295 config_store.mode_set[i][j].fan_control.manual = true;
296 }

--- 99 unchanged lines hidden --- 		289 amd_pmf_update_power_threshold(i);
290
291 for (j = 0; j < CNQF_MODE_MAX; j++) {
292 if (config_store.mode_set[i][j].fan_control.fan_id == FAN_INDEX_AUTO)
293 config_store.mode_set[i][j].fan_control.manual = false;
294 else
295 config_store.mode_set[i][j].fan_control.manual = true;
296 }

--- 99 unchanged lines hidden ---