pinctrl-ocelot.c (aaccf3c97418f169afdbb5855e9cbcbda34e90fd) pinctrl-ocelot.c (da801ab56ad874897b0b255216767c983e665a4c)
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Microsemi SoCs pinctrl driver
4 *
5 * Author: <alexandre.belloni@free-electrons.com>
6 * License: Dual MIT/GPL
7 * Copyright (c) 2017 Microsemi Corporation
8 */

--- 23 unchanged lines hidden (view full) ---

32#define OCELOT_GPIO_OE 0x10
33#define OCELOT_GPIO_INTR 0x14
34#define OCELOT_GPIO_INTR_ENA 0x18
35#define OCELOT_GPIO_INTR_IDENT 0x1c
36#define OCELOT_GPIO_ALT0 0x20
37#define OCELOT_GPIO_ALT1 0x24
38#define OCELOT_GPIO_SD_MAP 0x28
39
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Microsemi SoCs pinctrl driver
4 *
5 * Author: <alexandre.belloni@free-electrons.com>
6 * License: Dual MIT/GPL
7 * Copyright (c) 2017 Microsemi Corporation
8 */

--- 23 unchanged lines hidden (view full) ---

32#define OCELOT_GPIO_OE 0x10
33#define OCELOT_GPIO_INTR 0x14
34#define OCELOT_GPIO_INTR_ENA 0x18
35#define OCELOT_GPIO_INTR_IDENT 0x1c
36#define OCELOT_GPIO_ALT0 0x20
37#define OCELOT_GPIO_ALT1 0x24
38#define OCELOT_GPIO_SD_MAP 0x28
39
40#define OCELOT_PINS 22
41#define OCELOT_FUNC_PER_PIN 4
42
43enum {
44 FUNC_NONE,
45 FUNC_GPIO,
46 FUNC_IRQ0_IN,
47 FUNC_IRQ0_OUT,
48 FUNC_IRQ1_IN,
49 FUNC_IRQ1_OUT,
50 FUNC_MIIM1,
40#define OCELOT_FUNC_PER_PIN 4
41
42enum {
43 FUNC_NONE,
44 FUNC_GPIO,
45 FUNC_IRQ0_IN,
46 FUNC_IRQ0_OUT,
47 FUNC_IRQ1_IN,
48 FUNC_IRQ1_OUT,
49 FUNC_MIIM1,
50 FUNC_MIIM2,
51 FUNC_PCI_WAKE,
52 FUNC_PTP0,
53 FUNC_PTP1,
54 FUNC_PTP2,
55 FUNC_PTP3,
56 FUNC_PWM,
57 FUNC_RECO_CLK0,
58 FUNC_RECO_CLK1,
59 FUNC_SFP0,
60 FUNC_SFP1,
61 FUNC_SFP2,
62 FUNC_SFP3,
63 FUNC_SFP4,
64 FUNC_SFP5,
51 FUNC_PCI_WAKE,
52 FUNC_PTP0,
53 FUNC_PTP1,
54 FUNC_PTP2,
55 FUNC_PTP3,
56 FUNC_PWM,
57 FUNC_RECO_CLK0,
58 FUNC_RECO_CLK1,
59 FUNC_SFP0,
60 FUNC_SFP1,
61 FUNC_SFP2,
62 FUNC_SFP3,
63 FUNC_SFP4,
64 FUNC_SFP5,
65 FUNC_SFP6,
66 FUNC_SFP7,
67 FUNC_SFP8,
68 FUNC_SFP9,
69 FUNC_SFP10,
70 FUNC_SFP11,
71 FUNC_SFP12,
72 FUNC_SFP13,
73 FUNC_SFP14,
74 FUNC_SFP15,
65 FUNC_SG0,
75 FUNC_SG0,
76 FUNC_SG1,
77 FUNC_SG2,
66 FUNC_SI,
67 FUNC_TACHO,
68 FUNC_TWI,
78 FUNC_SI,
79 FUNC_TACHO,
80 FUNC_TWI,
81 FUNC_TWI2,
69 FUNC_TWI_SCL_M,
70 FUNC_UART,
71 FUNC_UART2,
72 FUNC_MAX
73};
74
75static const char *const ocelot_function_names[] = {
76 [FUNC_NONE] = "none",
77 [FUNC_GPIO] = "gpio",
78 [FUNC_IRQ0_IN] = "irq0_in",
79 [FUNC_IRQ0_OUT] = "irq0_out",
80 [FUNC_IRQ1_IN] = "irq1_in",
81 [FUNC_IRQ1_OUT] = "irq1_out",
82 [FUNC_MIIM1] = "miim1",
82 FUNC_TWI_SCL_M,
83 FUNC_UART,
84 FUNC_UART2,
85 FUNC_MAX
86};
87
88static const char *const ocelot_function_names[] = {
89 [FUNC_NONE] = "none",
90 [FUNC_GPIO] = "gpio",
91 [FUNC_IRQ0_IN] = "irq0_in",
92 [FUNC_IRQ0_OUT] = "irq0_out",
93 [FUNC_IRQ1_IN] = "irq1_in",
94 [FUNC_IRQ1_OUT] = "irq1_out",
95 [FUNC_MIIM1] = "miim1",
96 [FUNC_MIIM2] = "miim2",
83 [FUNC_PCI_WAKE] = "pci_wake",
84 [FUNC_PTP0] = "ptp0",
85 [FUNC_PTP1] = "ptp1",
86 [FUNC_PTP2] = "ptp2",
87 [FUNC_PTP3] = "ptp3",
88 [FUNC_PWM] = "pwm",
89 [FUNC_RECO_CLK0] = "reco_clk0",
90 [FUNC_RECO_CLK1] = "reco_clk1",
91 [FUNC_SFP0] = "sfp0",
92 [FUNC_SFP1] = "sfp1",
93 [FUNC_SFP2] = "sfp2",
94 [FUNC_SFP3] = "sfp3",
95 [FUNC_SFP4] = "sfp4",
96 [FUNC_SFP5] = "sfp5",
97 [FUNC_PCI_WAKE] = "pci_wake",
98 [FUNC_PTP0] = "ptp0",
99 [FUNC_PTP1] = "ptp1",
100 [FUNC_PTP2] = "ptp2",
101 [FUNC_PTP3] = "ptp3",
102 [FUNC_PWM] = "pwm",
103 [FUNC_RECO_CLK0] = "reco_clk0",
104 [FUNC_RECO_CLK1] = "reco_clk1",
105 [FUNC_SFP0] = "sfp0",
106 [FUNC_SFP1] = "sfp1",
107 [FUNC_SFP2] = "sfp2",
108 [FUNC_SFP3] = "sfp3",
109 [FUNC_SFP4] = "sfp4",
110 [FUNC_SFP5] = "sfp5",
111 [FUNC_SFP6] = "sfp6",
112 [FUNC_SFP7] = "sfp7",
113 [FUNC_SFP8] = "sfp8",
114 [FUNC_SFP9] = "sfp9",
115 [FUNC_SFP10] = "sfp10",
116 [FUNC_SFP11] = "sfp11",
117 [FUNC_SFP12] = "sfp12",
118 [FUNC_SFP13] = "sfp13",
119 [FUNC_SFP14] = "sfp14",
120 [FUNC_SFP15] = "sfp15",
97 [FUNC_SG0] = "sg0",
121 [FUNC_SG0] = "sg0",
122 [FUNC_SG1] = "sg1",
123 [FUNC_SG2] = "sg2",
98 [FUNC_SI] = "si",
99 [FUNC_TACHO] = "tacho",
100 [FUNC_TWI] = "twi",
124 [FUNC_SI] = "si",
125 [FUNC_TACHO] = "tacho",
126 [FUNC_TWI] = "twi",
127 [FUNC_TWI2] = "twi2",
101 [FUNC_TWI_SCL_M] = "twi_scl_m",
102 [FUNC_UART] = "uart",
103 [FUNC_UART2] = "uart2",
104};
105
106struct ocelot_pmx_func {
107 const char **groups;
108 unsigned int ngroups;

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113 unsigned char functions[OCELOT_FUNC_PER_PIN];
114};
115
116struct ocelot_pinctrl {
117 struct device *dev;
118 struct pinctrl_dev *pctl;
119 struct gpio_chip gpio_chip;
120 struct regmap *map;
128 [FUNC_TWI_SCL_M] = "twi_scl_m",
129 [FUNC_UART] = "uart",
130 [FUNC_UART2] = "uart2",
131};
132
133struct ocelot_pmx_func {
134 const char **groups;
135 unsigned int ngroups;

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140 unsigned char functions[OCELOT_FUNC_PER_PIN];
141};
142
143struct ocelot_pinctrl {
144 struct device *dev;
145 struct pinctrl_dev *pctl;
146 struct gpio_chip gpio_chip;
147 struct regmap *map;
148 struct pinctrl_desc *desc;
121 struct ocelot_pmx_func func[FUNC_MAX];
149 struct ocelot_pmx_func func[FUNC_MAX];
150 u8 stride;
122};
123
124#define OCELOT_P(p, f0, f1, f2) \
125static struct ocelot_pin_caps ocelot_pin_##p = { \
126 .pin = p, \
127 .functions = { \
128 FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2, \
129 }, \

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178 OCELOT_PIN(16),
179 OCELOT_PIN(17),
180 OCELOT_PIN(18),
181 OCELOT_PIN(19),
182 OCELOT_PIN(20),
183 OCELOT_PIN(21),
184};
185
151};
152
153#define OCELOT_P(p, f0, f1, f2) \
154static struct ocelot_pin_caps ocelot_pin_##p = { \
155 .pin = p, \
156 .functions = { \
157 FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2, \
158 }, \

--- 48 unchanged lines hidden (view full) ---

207 OCELOT_PIN(16),
208 OCELOT_PIN(17),
209 OCELOT_PIN(18),
210 OCELOT_PIN(19),
211 OCELOT_PIN(20),
212 OCELOT_PIN(21),
213};
214
215#define JAGUAR2_P(p, f0, f1) \
216static struct ocelot_pin_caps jaguar2_pin_##p = { \
217 .pin = p, \
218 .functions = { \
219 FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_NONE \
220 }, \
221}
222
223JAGUAR2_P(0, SG0, NONE);
224JAGUAR2_P(1, SG0, NONE);
225JAGUAR2_P(2, SG0, NONE);
226JAGUAR2_P(3, SG0, NONE);
227JAGUAR2_P(4, SG1, NONE);
228JAGUAR2_P(5, SG1, NONE);
229JAGUAR2_P(6, IRQ0_IN, IRQ0_OUT);
230JAGUAR2_P(7, IRQ1_IN, IRQ1_OUT);
231JAGUAR2_P(8, PTP0, NONE);
232JAGUAR2_P(9, PTP1, NONE);
233JAGUAR2_P(10, UART, NONE);
234JAGUAR2_P(11, UART, NONE);
235JAGUAR2_P(12, SG1, NONE);
236JAGUAR2_P(13, SG1, NONE);
237JAGUAR2_P(14, TWI, TWI_SCL_M);
238JAGUAR2_P(15, TWI, NONE);
239JAGUAR2_P(16, SI, TWI_SCL_M);
240JAGUAR2_P(17, SI, TWI_SCL_M);
241JAGUAR2_P(18, SI, TWI_SCL_M);
242JAGUAR2_P(19, PCI_WAKE, NONE);
243JAGUAR2_P(20, IRQ0_OUT, TWI_SCL_M);
244JAGUAR2_P(21, IRQ1_OUT, TWI_SCL_M);
245JAGUAR2_P(22, TACHO, NONE);
246JAGUAR2_P(23, PWM, NONE);
247JAGUAR2_P(24, UART2, NONE);
248JAGUAR2_P(25, UART2, SI);
249JAGUAR2_P(26, PTP2, SI);
250JAGUAR2_P(27, PTP3, SI);
251JAGUAR2_P(28, TWI2, SI);
252JAGUAR2_P(29, TWI2, SI);
253JAGUAR2_P(30, SG2, SI);
254JAGUAR2_P(31, SG2, SI);
255JAGUAR2_P(32, SG2, SI);
256JAGUAR2_P(33, SG2, SI);
257JAGUAR2_P(34, NONE, TWI_SCL_M);
258JAGUAR2_P(35, NONE, TWI_SCL_M);
259JAGUAR2_P(36, NONE, TWI_SCL_M);
260JAGUAR2_P(37, NONE, TWI_SCL_M);
261JAGUAR2_P(38, NONE, TWI_SCL_M);
262JAGUAR2_P(39, NONE, TWI_SCL_M);
263JAGUAR2_P(40, NONE, TWI_SCL_M);
264JAGUAR2_P(41, NONE, TWI_SCL_M);
265JAGUAR2_P(42, NONE, TWI_SCL_M);
266JAGUAR2_P(43, NONE, TWI_SCL_M);
267JAGUAR2_P(44, NONE, SFP8);
268JAGUAR2_P(45, NONE, SFP9);
269JAGUAR2_P(46, NONE, SFP10);
270JAGUAR2_P(47, NONE, SFP11);
271JAGUAR2_P(48, SFP0, NONE);
272JAGUAR2_P(49, SFP1, SI);
273JAGUAR2_P(50, SFP2, SI);
274JAGUAR2_P(51, SFP3, SI);
275JAGUAR2_P(52, SFP4, NONE);
276JAGUAR2_P(53, SFP5, NONE);
277JAGUAR2_P(54, SFP6, NONE);
278JAGUAR2_P(55, SFP7, NONE);
279JAGUAR2_P(56, MIIM1, SFP12);
280JAGUAR2_P(57, MIIM1, SFP13);
281JAGUAR2_P(58, MIIM2, SFP14);
282JAGUAR2_P(59, MIIM2, SFP15);
283JAGUAR2_P(60, NONE, NONE);
284JAGUAR2_P(61, NONE, NONE);
285JAGUAR2_P(62, NONE, NONE);
286JAGUAR2_P(63, NONE, NONE);
287
288#define JAGUAR2_PIN(n) { \
289 .number = n, \
290 .name = "GPIO_"#n, \
291 .drv_data = &jaguar2_pin_##n \
292}
293
294static const struct pinctrl_pin_desc jaguar2_pins[] = {
295 JAGUAR2_PIN(0),
296 JAGUAR2_PIN(1),
297 JAGUAR2_PIN(2),
298 JAGUAR2_PIN(3),
299 JAGUAR2_PIN(4),
300 JAGUAR2_PIN(5),
301 JAGUAR2_PIN(6),
302 JAGUAR2_PIN(7),
303 JAGUAR2_PIN(8),
304 JAGUAR2_PIN(9),
305 JAGUAR2_PIN(10),
306 JAGUAR2_PIN(11),
307 JAGUAR2_PIN(12),
308 JAGUAR2_PIN(13),
309 JAGUAR2_PIN(14),
310 JAGUAR2_PIN(15),
311 JAGUAR2_PIN(16),
312 JAGUAR2_PIN(17),
313 JAGUAR2_PIN(18),
314 JAGUAR2_PIN(19),
315 JAGUAR2_PIN(20),
316 JAGUAR2_PIN(21),
317 JAGUAR2_PIN(22),
318 JAGUAR2_PIN(23),
319 JAGUAR2_PIN(24),
320 JAGUAR2_PIN(25),
321 JAGUAR2_PIN(26),
322 JAGUAR2_PIN(27),
323 JAGUAR2_PIN(28),
324 JAGUAR2_PIN(29),
325 JAGUAR2_PIN(30),
326 JAGUAR2_PIN(31),
327 JAGUAR2_PIN(32),
328 JAGUAR2_PIN(33),
329 JAGUAR2_PIN(34),
330 JAGUAR2_PIN(35),
331 JAGUAR2_PIN(36),
332 JAGUAR2_PIN(37),
333 JAGUAR2_PIN(38),
334 JAGUAR2_PIN(39),
335 JAGUAR2_PIN(40),
336 JAGUAR2_PIN(41),
337 JAGUAR2_PIN(42),
338 JAGUAR2_PIN(43),
339 JAGUAR2_PIN(44),
340 JAGUAR2_PIN(45),
341 JAGUAR2_PIN(46),
342 JAGUAR2_PIN(47),
343 JAGUAR2_PIN(48),
344 JAGUAR2_PIN(49),
345 JAGUAR2_PIN(50),
346 JAGUAR2_PIN(51),
347 JAGUAR2_PIN(52),
348 JAGUAR2_PIN(53),
349 JAGUAR2_PIN(54),
350 JAGUAR2_PIN(55),
351 JAGUAR2_PIN(56),
352 JAGUAR2_PIN(57),
353 JAGUAR2_PIN(58),
354 JAGUAR2_PIN(59),
355 JAGUAR2_PIN(60),
356 JAGUAR2_PIN(61),
357 JAGUAR2_PIN(62),
358 JAGUAR2_PIN(63),
359};
360
186static int ocelot_get_functions_count(struct pinctrl_dev *pctldev)
187{
188 return ARRAY_SIZE(ocelot_function_names);
189}
190
191static const char *ocelot_get_function_name(struct pinctrl_dev *pctldev,
192 unsigned int function)
193{

--- 8 unchanged lines hidden (view full) ---

202 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
203
204 *groups = info->func[function].groups;
205 *num_groups = info->func[function].ngroups;
206
207 return 0;
208}
209
361static int ocelot_get_functions_count(struct pinctrl_dev *pctldev)
362{
363 return ARRAY_SIZE(ocelot_function_names);
364}
365
366static const char *ocelot_get_function_name(struct pinctrl_dev *pctldev,
367 unsigned int function)
368{

--- 8 unchanged lines hidden (view full) ---

377 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
378
379 *groups = info->func[function].groups;
380 *num_groups = info->func[function].ngroups;
381
382 return 0;
383}
384
210static int ocelot_pin_function_idx(unsigned int pin, unsigned int function)
385static int ocelot_pin_function_idx(struct ocelot_pinctrl *info,
386 unsigned int pin, unsigned int function)
211{
387{
212 struct ocelot_pin_caps *p = ocelot_pins[pin].drv_data;
388 struct ocelot_pin_caps *p = info->desc->pins[pin].drv_data;
213 int i;
214
215 for (i = 0; i < OCELOT_FUNC_PER_PIN; i++) {
216 if (function == p->functions[i])
217 return i;
218 }
219
220 return -1;
221}
222
389 int i;
390
391 for (i = 0; i < OCELOT_FUNC_PER_PIN; i++) {
392 if (function == p->functions[i])
393 return i;
394 }
395
396 return -1;
397}
398
399#define REG(r, info, p) ((r) * (info)->stride + (4 * ((p) / 32)))
400
223static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev,
224 unsigned int selector, unsigned int group)
225{
226 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
401static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev,
402 unsigned int selector, unsigned int group)
403{
404 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
227 struct ocelot_pin_caps *pin = ocelot_pins[group].drv_data;
405 struct ocelot_pin_caps *pin = info->desc->pins[group].drv_data;
406 unsigned int p = pin->pin % 32;
228 int f;
229
407 int f;
408
230 f = ocelot_pin_function_idx(group, selector);
409 f = ocelot_pin_function_idx(info, group, selector);
231 if (f < 0)
232 return -EINVAL;
233
234 /*
235 * f is encoded on two bits.
236 * bit 0 of f goes in BIT(pin) of ALT0, bit 1 of f goes in BIT(pin) of
237 * ALT1
238 * This is racy because both registers can't be updated at the same time
239 * but it doesn't matter much for now.
240 */
410 if (f < 0)
411 return -EINVAL;
412
413 /*
414 * f is encoded on two bits.
415 * bit 0 of f goes in BIT(pin) of ALT0, bit 1 of f goes in BIT(pin) of
416 * ALT1
417 * This is racy because both registers can't be updated at the same time
418 * but it doesn't matter much for now.
419 */
241 regmap_update_bits(info->map, OCELOT_GPIO_ALT0, BIT(pin->pin),
242 f << pin->pin);
243 regmap_update_bits(info->map, OCELOT_GPIO_ALT1, BIT(pin->pin),
244 f << (pin->pin - 1));
420 regmap_update_bits(info->map, REG(OCELOT_GPIO_ALT0, info, pin->pin),
421 BIT(p), f << p);
422 regmap_update_bits(info->map, REG(OCELOT_GPIO_ALT1, info, pin->pin),
423 BIT(p), f << (p - 1));
245
246 return 0;
247}
248
249static int ocelot_gpio_set_direction(struct pinctrl_dev *pctldev,
250 struct pinctrl_gpio_range *range,
251 unsigned int pin, bool input)
252{
253 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
424
425 return 0;
426}
427
428static int ocelot_gpio_set_direction(struct pinctrl_dev *pctldev,
429 struct pinctrl_gpio_range *range,
430 unsigned int pin, bool input)
431{
432 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
433 unsigned int p = pin % 32;
254
434
255 regmap_update_bits(info->map, OCELOT_GPIO_OE, BIT(pin),
256 input ? 0 : BIT(pin));
435 regmap_update_bits(info->map, REG(OCELOT_GPIO_OE, info, p), BIT(p),
436 input ? 0 : BIT(p));
257
258 return 0;
259}
260
261static int ocelot_gpio_request_enable(struct pinctrl_dev *pctldev,
262 struct pinctrl_gpio_range *range,
263 unsigned int offset)
264{
265 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
437
438 return 0;
439}
440
441static int ocelot_gpio_request_enable(struct pinctrl_dev *pctldev,
442 struct pinctrl_gpio_range *range,
443 unsigned int offset)
444{
445 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
446 unsigned int p = offset % 32;
266
447
267 regmap_update_bits(info->map, OCELOT_GPIO_ALT0, BIT(offset), 0);
268 regmap_update_bits(info->map, OCELOT_GPIO_ALT1, BIT(offset), 0);
448 regmap_update_bits(info->map, REG(OCELOT_GPIO_ALT0, info, offset),
449 BIT(p), 0);
450 regmap_update_bits(info->map, REG(OCELOT_GPIO_ALT1, info, offset),
451 BIT(p), 0);
269
270 return 0;
271}
272
273static const struct pinmux_ops ocelot_pmx_ops = {
274 .get_functions_count = ocelot_get_functions_count,
275 .get_function_name = ocelot_get_function_name,
276 .get_function_groups = ocelot_get_function_groups,
277 .set_mux = ocelot_pinmux_set_mux,
278 .gpio_set_direction = ocelot_gpio_set_direction,
279 .gpio_request_enable = ocelot_gpio_request_enable,
280};
281
282static int ocelot_pctl_get_groups_count(struct pinctrl_dev *pctldev)
283{
452
453 return 0;
454}
455
456static const struct pinmux_ops ocelot_pmx_ops = {
457 .get_functions_count = ocelot_get_functions_count,
458 .get_function_name = ocelot_get_function_name,
459 .get_function_groups = ocelot_get_function_groups,
460 .set_mux = ocelot_pinmux_set_mux,
461 .gpio_set_direction = ocelot_gpio_set_direction,
462 .gpio_request_enable = ocelot_gpio_request_enable,
463};
464
465static int ocelot_pctl_get_groups_count(struct pinctrl_dev *pctldev)
466{
284 return ARRAY_SIZE(ocelot_pins);
467 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
468
469 return info->desc->npins;
285}
286
287static const char *ocelot_pctl_get_group_name(struct pinctrl_dev *pctldev,
288 unsigned int group)
289{
470}
471
472static const char *ocelot_pctl_get_group_name(struct pinctrl_dev *pctldev,
473 unsigned int group)
474{
290 return ocelot_pins[group].name;
475 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
476
477 return info->desc->pins[group].name;
291}
292
293static int ocelot_pctl_get_group_pins(struct pinctrl_dev *pctldev,
294 unsigned int group,
295 const unsigned int **pins,
296 unsigned int *num_pins)
297{
478}
479
480static int ocelot_pctl_get_group_pins(struct pinctrl_dev *pctldev,
481 unsigned int group,
482 const unsigned int **pins,
483 unsigned int *num_pins)
484{
298 *pins = &ocelot_pins[group].number;
485 struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
486
487 *pins = &info->desc->pins[group].number;
299 *num_pins = 1;
300
301 return 0;
302}
303
304static const struct pinctrl_ops ocelot_pctl_ops = {
305 .get_groups_count = ocelot_pctl_get_groups_count,
306 .get_group_name = ocelot_pctl_get_group_name,

--- 6 unchanged lines hidden (view full) ---

313 .name = "ocelot-pinctrl",
314 .pins = ocelot_pins,
315 .npins = ARRAY_SIZE(ocelot_pins),
316 .pctlops = &ocelot_pctl_ops,
317 .pmxops = &ocelot_pmx_ops,
318 .owner = THIS_MODULE,
319};
320
488 *num_pins = 1;
489
490 return 0;
491}
492
493static const struct pinctrl_ops ocelot_pctl_ops = {
494 .get_groups_count = ocelot_pctl_get_groups_count,
495 .get_group_name = ocelot_pctl_get_group_name,

--- 6 unchanged lines hidden (view full) ---

502 .name = "ocelot-pinctrl",
503 .pins = ocelot_pins,
504 .npins = ARRAY_SIZE(ocelot_pins),
505 .pctlops = &ocelot_pctl_ops,
506 .pmxops = &ocelot_pmx_ops,
507 .owner = THIS_MODULE,
508};
509
510static struct pinctrl_desc jaguar2_desc = {
511 .name = "jaguar2-pinctrl",
512 .pins = jaguar2_pins,
513 .npins = ARRAY_SIZE(jaguar2_pins),
514 .pctlops = &ocelot_pctl_ops,
515 .pmxops = &ocelot_pmx_ops,
516 .owner = THIS_MODULE,
517};
518
321static int ocelot_create_group_func_map(struct device *dev,
322 struct ocelot_pinctrl *info)
323{
519static int ocelot_create_group_func_map(struct device *dev,
520 struct ocelot_pinctrl *info)
521{
324 u16 pins[ARRAY_SIZE(ocelot_pins)];
325 int f, npins, i;
522 int f, npins, i;
523 u8 *pins = kcalloc(info->desc->npins, sizeof(u8), GFP_KERNEL);
326
524
525 if (!pins)
526 return -ENOMEM;
527
327 for (f = 0; f < FUNC_MAX; f++) {
528 for (f = 0; f < FUNC_MAX; f++) {
328 for (npins = 0, i = 0; i < ARRAY_SIZE(ocelot_pins); i++) {
329 if (ocelot_pin_function_idx(i, f) >= 0)
529 for (npins = 0, i = 0; i < info->desc->npins; i++) {
530 if (ocelot_pin_function_idx(info, i, f) >= 0)
330 pins[npins++] = i;
331 }
332
531 pins[npins++] = i;
532 }
533
534 if (!npins)
535 continue;
536
333 info->func[f].ngroups = npins;
537 info->func[f].ngroups = npins;
334 info->func[f].groups = devm_kcalloc(dev,
335 npins,
336 sizeof(char *),
337 GFP_KERNEL);
338 if (!info->func[f].groups)
538 info->func[f].groups = devm_kcalloc(dev, npins, sizeof(char *),
539 GFP_KERNEL);
540 if (!info->func[f].groups) {
541 kfree(pins);
339 return -ENOMEM;
542 return -ENOMEM;
543 }
340
341 for (i = 0; i < npins; i++)
544
545 for (i = 0; i < npins; i++)
342 info->func[f].groups[i] = ocelot_pins[pins[i]].name;
546 info->func[f].groups[i] = info->desc->pins[pins[i]].name;
343 }
344
547 }
548
549 kfree(pins);
550
345 return 0;
346}
347
348static int ocelot_pinctrl_register(struct platform_device *pdev,
349 struct ocelot_pinctrl *info)
350{
351 int ret;
352
353 ret = ocelot_create_group_func_map(&pdev->dev, info);
354 if (ret) {
355 dev_err(&pdev->dev, "Unable to create group func map.\n");
356 return ret;
357 }
358
551 return 0;
552}
553
554static int ocelot_pinctrl_register(struct platform_device *pdev,
555 struct ocelot_pinctrl *info)
556{
557 int ret;
558
559 ret = ocelot_create_group_func_map(&pdev->dev, info);
560 if (ret) {
561 dev_err(&pdev->dev, "Unable to create group func map.\n");
562 return ret;
563 }
564
359 info->pctl = devm_pinctrl_register(&pdev->dev, &ocelot_desc, info);
565 info->pctl = devm_pinctrl_register(&pdev->dev, info->desc, info);
360 if (IS_ERR(info->pctl)) {
361 dev_err(&pdev->dev, "Failed to register pinctrl\n");
362 return PTR_ERR(info->pctl);
363 }
364
365 return 0;
366}
367
368static int ocelot_gpio_get(struct gpio_chip *chip, unsigned int offset)
369{
370 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
371 unsigned int val;
372
566 if (IS_ERR(info->pctl)) {
567 dev_err(&pdev->dev, "Failed to register pinctrl\n");
568 return PTR_ERR(info->pctl);
569 }
570
571 return 0;
572}
573
574static int ocelot_gpio_get(struct gpio_chip *chip, unsigned int offset)
575{
576 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
577 unsigned int val;
578
373 regmap_read(info->map, OCELOT_GPIO_IN, &val);
579 regmap_read(info->map, REG(OCELOT_GPIO_IN, info, offset), &val);
374
580
375 return !!(val & BIT(offset));
581 return !!(val & BIT(offset % 32));
376}
377
378static void ocelot_gpio_set(struct gpio_chip *chip, unsigned int offset,
379 int value)
380{
381 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
382
383 if (value)
582}
583
584static void ocelot_gpio_set(struct gpio_chip *chip, unsigned int offset,
585 int value)
586{
587 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
588
589 if (value)
384 regmap_write(info->map, OCELOT_GPIO_OUT_SET, BIT(offset));
590 regmap_write(info->map, REG(OCELOT_GPIO_OUT_SET, info, offset),
591 BIT(offset % 32));
385 else
592 else
386 regmap_write(info->map, OCELOT_GPIO_OUT_CLR, BIT(offset));
593 regmap_write(info->map, REG(OCELOT_GPIO_OUT_CLR, info, offset),
594 BIT(offset % 32));
387}
388
389static int ocelot_gpio_get_direction(struct gpio_chip *chip,
390 unsigned int offset)
391{
392 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
393 unsigned int val;
394
595}
596
597static int ocelot_gpio_get_direction(struct gpio_chip *chip,
598 unsigned int offset)
599{
600 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
601 unsigned int val;
602
395 regmap_read(info->map, OCELOT_GPIO_OE, &val);
603 regmap_read(info->map, REG(OCELOT_GPIO_OE, info, offset), &val);
396
604
397 return !(val & BIT(offset));
605 return !(val & BIT(offset % 32));
398}
399
400static int ocelot_gpio_direction_input(struct gpio_chip *chip,
401 unsigned int offset)
402{
403 return pinctrl_gpio_direction_input(chip->base + offset);
404}
405
406static int ocelot_gpio_direction_output(struct gpio_chip *chip,
407 unsigned int offset, int value)
408{
409 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
606}
607
608static int ocelot_gpio_direction_input(struct gpio_chip *chip,
609 unsigned int offset)
610{
611 return pinctrl_gpio_direction_input(chip->base + offset);
612}
613
614static int ocelot_gpio_direction_output(struct gpio_chip *chip,
615 unsigned int offset, int value)
616{
617 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
410 unsigned int pin = BIT(offset);
618 unsigned int pin = BIT(offset % 32);
411
412 if (value)
619
620 if (value)
413 regmap_write(info->map, OCELOT_GPIO_OUT_SET, pin);
621 regmap_write(info->map, REG(OCELOT_GPIO_OUT_SET, info, offset),
622 pin);
414 else
623 else
415 regmap_write(info->map, OCELOT_GPIO_OUT_CLR, pin);
624 regmap_write(info->map, REG(OCELOT_GPIO_OUT_CLR, info, offset),
625 pin);
416
417 return pinctrl_gpio_direction_output(chip->base + offset);
418}
419
420static const struct gpio_chip ocelot_gpiolib_chip = {
421 .request = gpiochip_generic_request,
422 .free = gpiochip_generic_free,
423 .set = ocelot_gpio_set,

--- 5 unchanged lines hidden (view full) ---

429};
430
431static void ocelot_irq_mask(struct irq_data *data)
432{
433 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
434 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
435 unsigned int gpio = irqd_to_hwirq(data);
436
626
627 return pinctrl_gpio_direction_output(chip->base + offset);
628}
629
630static const struct gpio_chip ocelot_gpiolib_chip = {
631 .request = gpiochip_generic_request,
632 .free = gpiochip_generic_free,
633 .set = ocelot_gpio_set,

--- 5 unchanged lines hidden (view full) ---

639};
640
641static void ocelot_irq_mask(struct irq_data *data)
642{
643 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
644 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
645 unsigned int gpio = irqd_to_hwirq(data);
646
437 regmap_update_bits(info->map, OCELOT_GPIO_INTR_ENA, BIT(gpio), 0);
647 regmap_update_bits(info->map, REG(OCELOT_GPIO_INTR_ENA, info, gpio),
648 BIT(gpio % 32), 0);
438}
439
440static void ocelot_irq_unmask(struct irq_data *data)
441{
442 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
443 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
444 unsigned int gpio = irqd_to_hwirq(data);
445
649}
650
651static void ocelot_irq_unmask(struct irq_data *data)
652{
653 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
654 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
655 unsigned int gpio = irqd_to_hwirq(data);
656
446 regmap_update_bits(info->map, OCELOT_GPIO_INTR_ENA, BIT(gpio),
447 BIT(gpio));
657 regmap_update_bits(info->map, REG(OCELOT_GPIO_INTR_ENA, info, gpio),
658 BIT(gpio % 32), BIT(gpio % 32));
448}
449
450static void ocelot_irq_ack(struct irq_data *data)
451{
452 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
453 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
454 unsigned int gpio = irqd_to_hwirq(data);
455
659}
660
661static void ocelot_irq_ack(struct irq_data *data)
662{
663 struct gpio_chip *chip = irq_data_get_irq_chip_data(data);
664 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
665 unsigned int gpio = irqd_to_hwirq(data);
666
456 regmap_write_bits(info->map, OCELOT_GPIO_INTR, BIT(gpio), BIT(gpio));
667 regmap_write_bits(info->map, REG(OCELOT_GPIO_INTR, info, gpio),
668 BIT(gpio % 32), BIT(gpio % 32));
457}
458
459static int ocelot_irq_set_type(struct irq_data *data, unsigned int type);
460
461static struct irq_chip ocelot_eoi_irqchip = {
462 .name = "gpio",
463 .irq_mask = ocelot_irq_mask,
464 .irq_eoi = ocelot_irq_ack,

--- 27 unchanged lines hidden (view full) ---

492 return 0;
493}
494
495static void ocelot_irq_handler(struct irq_desc *desc)
496{
497 struct irq_chip *parent_chip = irq_desc_get_chip(desc);
498 struct gpio_chip *chip = irq_desc_get_handler_data(desc);
499 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
669}
670
671static int ocelot_irq_set_type(struct irq_data *data, unsigned int type);
672
673static struct irq_chip ocelot_eoi_irqchip = {
674 .name = "gpio",
675 .irq_mask = ocelot_irq_mask,
676 .irq_eoi = ocelot_irq_ack,

--- 27 unchanged lines hidden (view full) ---

704 return 0;
705}
706
707static void ocelot_irq_handler(struct irq_desc *desc)
708{
709 struct irq_chip *parent_chip = irq_desc_get_chip(desc);
710 struct gpio_chip *chip = irq_desc_get_handler_data(desc);
711 struct ocelot_pinctrl *info = gpiochip_get_data(chip);
500 unsigned int reg = 0, irq;
712 unsigned int reg = 0, irq, i;
501 unsigned long irqs;
502
713 unsigned long irqs;
714
503 regmap_read(info->map, OCELOT_GPIO_INTR_IDENT, &reg);
504 if (!reg)
505 return;
715 for (i = 0; i < info->stride; i++) {
716 regmap_read(info->map, OCELOT_GPIO_INTR_IDENT + 4 * i, &reg);
717 if (!reg)
718 continue;
506
719
507 chained_irq_enter(parent_chip, desc);
720 chained_irq_enter(parent_chip, desc);
508
721
509 irqs = reg;
722 irqs = reg;
510
723
511 for_each_set_bit(irq, &irqs, OCELOT_PINS) {
512 generic_handle_irq(irq_linear_revmap(chip->irq.domain, irq));
513 }
724 for_each_set_bit(irq, &irqs,
725 min(32U, info->desc->npins - 32 * i))
726 generic_handle_irq(irq_linear_revmap(chip->irq.domain,
727 irq + 32 * i));
514
728
515 chained_irq_exit(parent_chip, desc);
729 chained_irq_exit(parent_chip, desc);
730 }
516}
517
518static int ocelot_gpiochip_register(struct platform_device *pdev,
519 struct ocelot_pinctrl *info)
520{
521 struct gpio_chip *gc;
522 int ret, irq;
523
524 info->gpio_chip = ocelot_gpiolib_chip;
525
526 gc = &info->gpio_chip;
731}
732
733static int ocelot_gpiochip_register(struct platform_device *pdev,
734 struct ocelot_pinctrl *info)
735{
736 struct gpio_chip *gc;
737 int ret, irq;
738
739 info->gpio_chip = ocelot_gpiolib_chip;
740
741 gc = &info->gpio_chip;
527 gc->ngpio = OCELOT_PINS;
742 gc->ngpio = info->desc->npins;
528 gc->parent = &pdev->dev;
529 gc->base = 0;
530 gc->of_node = info->dev->of_node;
531 gc->label = "ocelot-gpio";
532
533 ret = devm_gpiochip_add_data(&pdev->dev, gc, info);
534 if (ret)
535 return ret;

--- 8 unchanged lines hidden (view full) ---

544 return ret;
545
546 gpiochip_set_chained_irqchip(gc, &ocelot_irqchip, irq,
547 ocelot_irq_handler);
548
549 return 0;
550}
551
743 gc->parent = &pdev->dev;
744 gc->base = 0;
745 gc->of_node = info->dev->of_node;
746 gc->label = "ocelot-gpio";
747
748 ret = devm_gpiochip_add_data(&pdev->dev, gc, info);
749 if (ret)
750 return ret;

--- 8 unchanged lines hidden (view full) ---

759 return ret;
760
761 gpiochip_set_chained_irqchip(gc, &ocelot_irqchip, irq,
762 ocelot_irq_handler);
763
764 return 0;
765}
766
552static const struct regmap_config ocelot_pinctrl_regmap_config = {
553 .reg_bits = 32,
554 .val_bits = 32,
555 .reg_stride = 4,
556 .max_register = 0x64,
557};
558
559static const struct of_device_id ocelot_pinctrl_of_match[] = {
767static const struct of_device_id ocelot_pinctrl_of_match[] = {
560 { .compatible = "mscc,ocelot-pinctrl" },
768 { .compatible = "mscc,ocelot-pinctrl", .data = &ocelot_desc },
769 { .compatible = "mscc,jaguar2-pinctrl", .data = &jaguar2_desc },
561 {},
562};
563
564static int ocelot_pinctrl_probe(struct platform_device *pdev)
565{
566 struct device *dev = &pdev->dev;
567 struct ocelot_pinctrl *info;
568 void __iomem *base;
569 int ret;
770 {},
771};
772
773static int ocelot_pinctrl_probe(struct platform_device *pdev)
774{
775 struct device *dev = &pdev->dev;
776 struct ocelot_pinctrl *info;
777 void __iomem *base;
778 int ret;
779 struct regmap_config regmap_config = {
780 .reg_bits = 32,
781 .val_bits = 32,
782 .reg_stride = 4,
783 };
570
571 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
572 if (!info)
573 return -ENOMEM;
574
784
785 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
786 if (!info)
787 return -ENOMEM;
788
789 info->desc = (struct pinctrl_desc *)device_get_match_data(dev);
790
575 base = devm_ioremap_resource(dev,
576 platform_get_resource(pdev, IORESOURCE_MEM, 0));
577 if (IS_ERR(base)) {
578 dev_err(dev, "Failed to ioremap registers\n");
579 return PTR_ERR(base);
580 }
581
791 base = devm_ioremap_resource(dev,
792 platform_get_resource(pdev, IORESOURCE_MEM, 0));
793 if (IS_ERR(base)) {
794 dev_err(dev, "Failed to ioremap registers\n");
795 return PTR_ERR(base);
796 }
797
582 info->map = devm_regmap_init_mmio(dev, base,
583 &ocelot_pinctrl_regmap_config);
798 info->stride = 1 + (info->desc->npins - 1) / 32;
799 regmap_config.max_register = OCELOT_GPIO_SD_MAP * info->stride + 15 * 4;
800
801 info->map = devm_regmap_init_mmio(dev, base, &regmap_config);
584 if (IS_ERR(info->map)) {
585 dev_err(dev, "Failed to create regmap\n");
586 return PTR_ERR(info->map);
587 }
588 dev_set_drvdata(dev, info->map);
589 info->dev = dev;
590
591 ret = ocelot_pinctrl_register(pdev, info);

--- 19 unchanged lines hidden --- 		802 if (IS_ERR(info->map)) {
803 dev_err(dev, "Failed to create regmap\n");
804 return PTR_ERR(info->map);
805 }
806 dev_set_drvdata(dev, info->map);
807 info->dev = dev;
808
809 ret = ocelot_pinctrl_register(pdev, info);

--- 19 unchanged lines hidden ---