pinctrl-meson.c (40833a84faed72f333b1626f00f59e6bebea4d98) pinctrl-meson.c (277d14eb815fdfb95a72ea126bc09f75a2bd58fd)
1/*
2 * Pin controller and GPIO driver for Amlogic Meson SoCs
3 *
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.

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45 */
46
47#include <linux/device.h>
48#include <linux/gpio.h>
49#include <linux/init.h>
50#include <linux/io.h>
51#include <linux/of.h>
52#include <linux/of_address.h>
1/*
2 * Pin controller and GPIO driver for Amlogic Meson SoCs
3 *
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.

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45 */
46
47#include <linux/device.h>
48#include <linux/gpio.h>
49#include <linux/init.h>
50#include <linux/io.h>
51#include <linux/of.h>
52#include <linux/of_address.h>
53#include <linux/of_device.h>
53#include <linux/pinctrl/pinconf-generic.h>
54#include <linux/pinctrl/pinconf.h>
55#include <linux/pinctrl/pinctrl.h>
56#include <linux/pinctrl/pinmux.h>
57#include <linux/platform_device.h>
58#include <linux/regmap.h>
59#include <linux/seq_file.h>
60

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394 }
395
396 return 0;
397}
398
399static int meson_pinconf_group_get(struct pinctrl_dev *pcdev,
400 unsigned int group, unsigned long *config)
401{
54#include <linux/pinctrl/pinconf-generic.h>
55#include <linux/pinctrl/pinconf.h>
56#include <linux/pinctrl/pinctrl.h>
57#include <linux/pinctrl/pinmux.h>
58#include <linux/platform_device.h>
59#include <linux/regmap.h>
60#include <linux/seq_file.h>
61

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395 }
396
397 return 0;
398}
399
400static int meson_pinconf_group_get(struct pinctrl_dev *pcdev,
401 unsigned int group, unsigned long *config)
402{
402 return -ENOSYS;
403 return -ENOTSUPP;
403}
404
405static const struct pinconf_ops meson_pinconf_ops = {
406 .pin_config_get = meson_pinconf_get,
407 .pin_config_set = meson_pinconf_set,
408 .pin_config_group_get = meson_pinconf_group_get,
409 .pin_config_group_set = meson_pinconf_group_set,
410 .is_generic = true,
411};
412
413static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
414{
415 struct meson_pinctrl *pc = gpiochip_get_data(chip);
404}
405
406static const struct pinconf_ops meson_pinconf_ops = {
407 .pin_config_get = meson_pinconf_get,
408 .pin_config_set = meson_pinconf_set,
409 .pin_config_group_get = meson_pinconf_group_get,
410 .pin_config_group_set = meson_pinconf_group_set,
411 .is_generic = true,
412};
413
414static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
415{
416 struct meson_pinctrl *pc = gpiochip_get_data(chip);
416 unsigned int reg, bit, pin;
417 unsigned int reg, bit;
417 struct meson_bank *bank;
418 int ret;
419
418 struct meson_bank *bank;
419 int ret;
420
420 pin = pc->data->pin_base + gpio;
421 ret = meson_get_bank(pc, pin, &bank);
421 ret = meson_get_bank(pc, gpio, &bank);
422 if (ret)
423 return ret;
424
422 if (ret)
423 return ret;
424
425 meson_calc_reg_and_bit(bank, pin, REG_DIR, &reg, &bit);
425 meson_calc_reg_and_bit(bank, gpio, REG_DIR, &reg, &bit);
426
427 return regmap_update_bits(pc->reg_gpio, reg, BIT(bit), BIT(bit));
428}
429
430static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
431 int value)
432{
433 struct meson_pinctrl *pc = gpiochip_get_data(chip);
426
427 return regmap_update_bits(pc->reg_gpio, reg, BIT(bit), BIT(bit));
428}
429
430static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
431 int value)
432{
433 struct meson_pinctrl *pc = gpiochip_get_data(chip);
434 unsigned int reg, bit, pin;
434 unsigned int reg, bit;
435 struct meson_bank *bank;
436 int ret;
437
435 struct meson_bank *bank;
436 int ret;
437
438 pin = pc->data->pin_base + gpio;
439 ret = meson_get_bank(pc, pin, &bank);
438 ret = meson_get_bank(pc, gpio, &bank);
440 if (ret)
441 return ret;
442
439 if (ret)
440 return ret;
441
443 meson_calc_reg_and_bit(bank, pin, REG_DIR, &reg, &bit);
442 meson_calc_reg_and_bit(bank, gpio, REG_DIR, &reg, &bit);
444 ret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0);
445 if (ret)
446 return ret;
447
443 ret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0);
444 if (ret)
445 return ret;
446
448 meson_calc_reg_and_bit(bank, pin, REG_OUT, &reg, &bit);
447 meson_calc_reg_and_bit(bank, gpio, REG_OUT, &reg, &bit);
449 return regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
450 value ? BIT(bit) : 0);
451}
452
453static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
454{
455 struct meson_pinctrl *pc = gpiochip_get_data(chip);
448 return regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
449 value ? BIT(bit) : 0);
450}
451
452static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
453{
454 struct meson_pinctrl *pc = gpiochip_get_data(chip);
456 unsigned int reg, bit, pin;
455 unsigned int reg, bit;
457 struct meson_bank *bank;
458 int ret;
459
456 struct meson_bank *bank;
457 int ret;
458
460 pin = pc->data->pin_base + gpio;
461 ret = meson_get_bank(pc, pin, &bank);
459 ret = meson_get_bank(pc, gpio, &bank);
462 if (ret)
463 return;
464
460 if (ret)
461 return;
462
465 meson_calc_reg_and_bit(bank, pin, REG_OUT, &reg, &bit);
463 meson_calc_reg_and_bit(bank, gpio, REG_OUT, &reg, &bit);
466 regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
467 value ? BIT(bit) : 0);
468}
469
470static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
471{
472 struct meson_pinctrl *pc = gpiochip_get_data(chip);
464 regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
465 value ? BIT(bit) : 0);
466}
467
468static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
469{
470 struct meson_pinctrl *pc = gpiochip_get_data(chip);
473 unsigned int reg, bit, val, pin;
471 unsigned int reg, bit, val;
474 struct meson_bank *bank;
475 int ret;
476
472 struct meson_bank *bank;
473 int ret;
474
477 pin = pc->data->pin_base + gpio;
478 ret = meson_get_bank(pc, pin, &bank);
475 ret = meson_get_bank(pc, gpio, &bank);
479 if (ret)
480 return ret;
481
476 if (ret)
477 return ret;
478
482 meson_calc_reg_and_bit(bank, pin, REG_IN, &reg, &bit);
479 meson_calc_reg_and_bit(bank, gpio, REG_IN, &reg, &bit);
483 regmap_read(pc->reg_gpio, reg, &val);
484
485 return !!(val & BIT(bit));
486}
487
480 regmap_read(pc->reg_gpio, reg, &val);
481
482 return !!(val & BIT(bit));
483}
484
488static const struct of_device_id meson_pinctrl_dt_match[] = {
489 {
490 .compatible = "amlogic,meson8-cbus-pinctrl",
491 .data = &meson8_cbus_pinctrl_data,
492 },
493 {
494 .compatible = "amlogic,meson8b-cbus-pinctrl",
495 .data = &meson8b_cbus_pinctrl_data,
496 },
497 {
498 .compatible = "amlogic,meson8-aobus-pinctrl",
499 .data = &meson8_aobus_pinctrl_data,
500 },
501 {
502 .compatible = "amlogic,meson8b-aobus-pinctrl",
503 .data = &meson8b_aobus_pinctrl_data,
504 },
505 {
506 .compatible = "amlogic,meson-gxbb-periphs-pinctrl",
507 .data = &meson_gxbb_periphs_pinctrl_data,
508 },
509 {
510 .compatible = "amlogic,meson-gxbb-aobus-pinctrl",
511 .data = &meson_gxbb_aobus_pinctrl_data,
512 },
513 {
514 .compatible = "amlogic,meson-gxl-periphs-pinctrl",
515 .data = &meson_gxl_periphs_pinctrl_data,
516 },
517 {
518 .compatible = "amlogic,meson-gxl-aobus-pinctrl",
519 .data = &meson_gxl_aobus_pinctrl_data,
520 },
521 { },
522};
523
524static int meson_gpiolib_register(struct meson_pinctrl *pc)
525{
526 int ret;
527
528 pc->chip.label = pc->data->name;
529 pc->chip.parent = pc->dev;
530 pc->chip.request = gpiochip_generic_request;
531 pc->chip.free = gpiochip_generic_free;
532 pc->chip.direction_input = meson_gpio_direction_input;
533 pc->chip.direction_output = meson_gpio_direction_output;
534 pc->chip.get = meson_gpio_get;
535 pc->chip.set = meson_gpio_set;
485static int meson_gpiolib_register(struct meson_pinctrl *pc)
486{
487 int ret;
488
489 pc->chip.label = pc->data->name;
490 pc->chip.parent = pc->dev;
491 pc->chip.request = gpiochip_generic_request;
492 pc->chip.free = gpiochip_generic_free;
493 pc->chip.direction_input = meson_gpio_direction_input;
494 pc->chip.direction_output = meson_gpio_direction_output;
495 pc->chip.get = meson_gpio_get;
496 pc->chip.set = meson_gpio_set;
536 pc->chip.base = pc->data->pin_base;
497 pc->chip.base = -1;
537 pc->chip.ngpio = pc->data->num_pins;
538 pc->chip.can_sleep = false;
539 pc->chip.of_node = pc->of_node;
540 pc->chip.of_gpio_n_cells = 2;
541
542 ret = gpiochip_add_data(&pc->chip, pc);
543 if (ret) {
544 dev_err(pc->dev, "can't add gpio chip %s\n",

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623 if (IS_ERR(pc->reg_gpio)) {
624 dev_err(pc->dev, "gpio registers not found\n");
625 return PTR_ERR(pc->reg_gpio);
626 }
627
628 return 0;
629}
630
498 pc->chip.ngpio = pc->data->num_pins;
499 pc->chip.can_sleep = false;
500 pc->chip.of_node = pc->of_node;
501 pc->chip.of_gpio_n_cells = 2;
502
503 ret = gpiochip_add_data(&pc->chip, pc);
504 if (ret) {
505 dev_err(pc->dev, "can't add gpio chip %s\n",

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584 if (IS_ERR(pc->reg_gpio)) {
585 dev_err(pc->dev, "gpio registers not found\n");
586 return PTR_ERR(pc->reg_gpio);
587 }
588
589 return 0;
590}
591
631static int meson_pinctrl_probe(struct platform_device *pdev)
592int meson_pinctrl_probe(struct platform_device *pdev)
632{
593{
633 const struct of_device_id *match;
634 struct device *dev = &pdev->dev;
635 struct meson_pinctrl *pc;
636 int ret;
637
638 pc = devm_kzalloc(dev, sizeof(struct meson_pinctrl), GFP_KERNEL);
639 if (!pc)
640 return -ENOMEM;
641
642 pc->dev = dev;
594 struct device *dev = &pdev->dev;
595 struct meson_pinctrl *pc;
596 int ret;
597
598 pc = devm_kzalloc(dev, sizeof(struct meson_pinctrl), GFP_KERNEL);
599 if (!pc)
600 return -ENOMEM;
601
602 pc->dev = dev;
643 match = of_match_node(meson_pinctrl_dt_match, pdev->dev.of_node);
644 pc->data = (struct meson_pinctrl_data *) match->data;
603 pc->data = (struct meson_pinctrl_data *) of_device_get_match_data(dev);
645
604
646 ret = meson_pinctrl_parse_dt(pc, pdev->dev.of_node);
605 ret = meson_pinctrl_parse_dt(pc, dev->of_node);
647 if (ret)
648 return ret;
649
650 pc->desc.name = "pinctrl-meson";
651 pc->desc.owner = THIS_MODULE;
652 pc->desc.pctlops = &meson_pctrl_ops;
653 pc->desc.pmxops = &meson_pmx_ops;
654 pc->desc.confops = &meson_pinconf_ops;
655 pc->desc.pins = pc->data->pins;
656 pc->desc.npins = pc->data->num_pins;
657
658 pc->pcdev = devm_pinctrl_register(pc->dev, &pc->desc, pc);
659 if (IS_ERR(pc->pcdev)) {
660 dev_err(pc->dev, "can't register pinctrl device");
661 return PTR_ERR(pc->pcdev);
662 }
663
664 return meson_gpiolib_register(pc);
665}
606 if (ret)
607 return ret;
608
609 pc->desc.name = "pinctrl-meson";
610 pc->desc.owner = THIS_MODULE;
611 pc->desc.pctlops = &meson_pctrl_ops;
612 pc->desc.pmxops = &meson_pmx_ops;
613 pc->desc.confops = &meson_pinconf_ops;
614 pc->desc.pins = pc->data->pins;
615 pc->desc.npins = pc->data->num_pins;
616
617 pc->pcdev = devm_pinctrl_register(pc->dev, &pc->desc, pc);
618 if (IS_ERR(pc->pcdev)) {
619 dev_err(pc->dev, "can't register pinctrl device");
620 return PTR_ERR(pc->pcdev);
621 }
622
623 return meson_gpiolib_register(pc);
624}
666
667static struct platform_driver meson_pinctrl_driver = {
668 .probe = meson_pinctrl_probe,
669 .driver = {
670 .name = "meson-pinctrl",
671 .of_match_table = meson_pinctrl_dt_match,
672 },
673};
674builtin_platform_driver(meson_pinctrl_driver);