Makefile (cdd5b5a9761fd66d17586e4f4ba6588c70e640ea) Makefile (af9597adc2f1e3609c67c9792a2469bb64e43ae9)
1# SPDX-License-Identifier: GPL-2.0
2obj-$(CONFIG_ARM_CCI_PMU) += arm-cci.o
3obj-$(CONFIG_ARM_CCN) += arm-ccn.o
4obj-$(CONFIG_ARM_CMN) += arm-cmn.o
5obj-$(CONFIG_ARM_DSU_PMU) += arm_dsu_pmu.o
6obj-$(CONFIG_ARM_PMU) += arm_pmu.o arm_pmu_platform.o
7obj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o
8obj-$(CONFIG_ARM_PMUV3) += arm_pmuv3.o

--- 9 unchanged lines hidden (view full) ---

18obj-$(CONFIG_THUNDERX2_PMU) += thunderx2_pmu.o
19obj-$(CONFIG_XGENE_PMU) += xgene_pmu.o
20obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o
21obj-$(CONFIG_ARM_DMC620_PMU) += arm_dmc620_pmu.o
22obj-$(CONFIG_MARVELL_CN10K_TAD_PMU) += marvell_cn10k_tad_pmu.o
23obj-$(CONFIG_MARVELL_CN10K_DDR_PMU) += marvell_cn10k_ddr_pmu.o
24obj-$(CONFIG_APPLE_M1_CPU_PMU) += apple_m1_cpu_pmu.o
25obj-$(CONFIG_ALIBABA_UNCORE_DRW_PMU) += alibaba_uncore_drw_pmu.o
1# SPDX-License-Identifier: GPL-2.0
2obj-$(CONFIG_ARM_CCI_PMU) += arm-cci.o
3obj-$(CONFIG_ARM_CCN) += arm-ccn.o
4obj-$(CONFIG_ARM_CMN) += arm-cmn.o
5obj-$(CONFIG_ARM_DSU_PMU) += arm_dsu_pmu.o
6obj-$(CONFIG_ARM_PMU) += arm_pmu.o arm_pmu_platform.o
7obj-$(CONFIG_ARM_PMU_ACPI) += arm_pmu_acpi.o
8obj-$(CONFIG_ARM_PMUV3) += arm_pmuv3.o

--- 9 unchanged lines hidden (view full) ---

18obj-$(CONFIG_THUNDERX2_PMU) += thunderx2_pmu.o
19obj-$(CONFIG_XGENE_PMU) += xgene_pmu.o
20obj-$(CONFIG_ARM_SPE_PMU) += arm_spe_pmu.o
21obj-$(CONFIG_ARM_DMC620_PMU) += arm_dmc620_pmu.o
22obj-$(CONFIG_MARVELL_CN10K_TAD_PMU) += marvell_cn10k_tad_pmu.o
23obj-$(CONFIG_MARVELL_CN10K_DDR_PMU) += marvell_cn10k_ddr_pmu.o
24obj-$(CONFIG_APPLE_M1_CPU_PMU) += apple_m1_cpu_pmu.o
25obj-$(CONFIG_ALIBABA_UNCORE_DRW_PMU) += alibaba_uncore_drw_pmu.o
26obj-$(CONFIG_DWC_PCIE_PMU) += dwc_pcie_pmu.o
26obj-$(CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU) += arm_cspmu/
27obj-$(CONFIG_MESON_DDR_PMU) += amlogic/
28obj-$(CONFIG_CXL_PMU) += cxl_pmu.o
27obj-$(CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU) += arm_cspmu/
28obj-$(CONFIG_MESON_DDR_PMU) += amlogic/
29obj-$(CONFIG_CXL_PMU) += cxl_pmu.o