pcie-designware.c (efaf16de43f59992afd37b4b8beb30ef511ddbfd) pcie-designware.c (4fbfa17f9a075593281034f566ca79cbf4930c82)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Synopsys DesignWare PCIe host controller driver
4 *
5 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
6 * https://www.samsung.com
7 *
8 * Author: Jingoo Han <jg1.han@samsung.com>

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318 if (PCI_VNDR_HEADER_REV(header) == vid->vsec_rev)
319 return vsec;
320 }
321 }
322
323 return 0;
324}
325
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Synopsys DesignWare PCIe host controller driver
4 *
5 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
6 * https://www.samsung.com
7 *
8 * Author: Jingoo Han <jg1.han@samsung.com>

--- 309 unchanged lines hidden (view full) ---

318 if (PCI_VNDR_HEADER_REV(header) == vid->vsec_rev)
319 return vsec;
320 }
321 }
322
323 return 0;
324}
325
326u16 dw_pcie_find_rasdes_capability(struct dw_pcie *pci)
327{
328 return dw_pcie_find_vsec_capability(pci, dwc_pcie_rasdes_vsec_ids);
329}
330EXPORT_SYMBOL_GPL(dw_pcie_find_rasdes_capability);
331
326int dw_pcie_read(void __iomem *addr, int size, u32 *val)
327{
328 if (!IS_ALIGNED((uintptr_t)addr, size)) {
329 *val = 0;
330 return PCIBIOS_BAD_REGISTER_NUMBER;
331 }
332
333 if (size == 4) {

--- 814 unchanged lines hidden --- 		332int dw_pcie_read(void __iomem *addr, int size, u32 *val)
333{
334 if (!IS_ALIGNED((uintptr_t)addr, size)) {
335 *val = 0;
336 return PCIBIOS_BAD_REGISTER_NUMBER;
337 }
338
339 if (size == 4) {

--- 814 unchanged lines hidden ---