| reg.h (9d4d8572a539ef807e21c196f145aa365fd52f0e) | reg.h (4830872685f80666b29bab6a930254809c18c40a) |
|---|---|
| 1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2/* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5#ifndef __RTW_REG_DEF_H__ 6#define __RTW_REG_DEF_H__ 7 8#define REG_SYS_FUNC_EN 0x0002 --- 292 unchanged lines hidden (view full) --- 301#define REG_MGQ_BDNY 0x0425 302#define REG_LIFETIME_EN 0x0426 303#define BIT_BA_PARSER_EN BIT(5) 304#define REG_SPEC_SIFS 0x0428 305#define REG_RETRY_LIMIT 0x042a 306#define REG_DARFRC 0x0430 307#define REG_DARFRCH 0x0434 308#define REG_RARFRCH 0x043C | 1/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2/* Copyright(c) 2018-2019 Realtek Corporation 3 */ 4 5#ifndef __RTW_REG_DEF_H__ 6#define __RTW_REG_DEF_H__ 7 8#define REG_SYS_FUNC_EN 0x0002 --- 292 unchanged lines hidden (view full) --- 301#define REG_MGQ_BDNY 0x0425 302#define REG_LIFETIME_EN 0x0426 303#define BIT_BA_PARSER_EN BIT(5) 304#define REG_SPEC_SIFS 0x0428 305#define REG_RETRY_LIMIT 0x042a 306#define REG_DARFRC 0x0430 307#define REG_DARFRCH 0x0434 308#define REG_RARFRCH 0x043C |
| 309#define REG_RRSR 0x0440 310#define BITS_RRSR_RSC GENMASK(22, 21) |
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| 309#define REG_ARFR0 0x0444 310#define REG_ARFRH0 0x0448 311#define REG_ARFR1_V1 0x044C 312#define REG_ARFRH1_V1 0x0450 313#define REG_CCK_CHECK 0x0454 314#define BIT_CHECK_CCK_EN BIT(7) 315#define REG_AMPDU_MAX_TIME_V1 0x0455 316#define REG_BCNQ1_BDNY_V1 0x0456 --- 349 unchanged lines hidden --- | 311#define REG_ARFR0 0x0444 312#define REG_ARFRH0 0x0448 313#define REG_ARFR1_V1 0x044C 314#define REG_ARFRH1_V1 0x0450 315#define REG_CCK_CHECK 0x0454 316#define BIT_CHECK_CCK_EN BIT(7) 317#define REG_AMPDU_MAX_TIME_V1 0x0455 318#define REG_BCNQ1_BDNY_V1 0x0456 --- 349 unchanged lines hidden --- |