hw.c (5bd4f692e0eba585674c58f68b8ff62c21468a2f) hw.c (b83faeda028bf361db9c796396e710d5fb1337b0)
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2009-2012 Realtek Corporation.*/
3
4#include "../wifi.h"
5#include "../efuse.h"
6#include "../base.h"
7#include "../regd.h"
8#include "../cam.h"

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97 switch (variable) {
98 case HW_VAR_RCR:
99 *((u32 *) (val)) = rtlpci->receive_config;
100 break;
101 case HW_VAR_RF_STATE:
102 *((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
103 break;
104 case HW_VAR_FWLPS_RF_ON:{
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2009-2012 Realtek Corporation.*/
3
4#include "../wifi.h"
5#include "../efuse.h"
6#include "../base.h"
7#include "../regd.h"
8#include "../cam.h"

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97 switch (variable) {
98 case HW_VAR_RCR:
99 *((u32 *) (val)) = rtlpci->receive_config;
100 break;
101 case HW_VAR_RF_STATE:
102 *((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
103 break;
104 case HW_VAR_FWLPS_RF_ON:{
105 enum rf_pwrstate rfState;
105 enum rf_pwrstate rfstate;
106 u32 val_rcr;
107
108 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE,
106 u32 val_rcr;
107
108 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RF_STATE,
109 (u8 *) (&rfState));
110 if (rfState == ERFOFF) {
109 (u8 *)(&rfstate));
110 if (rfstate == ERFOFF) {
111 *((bool *) (val)) = true;
112 } else {
113 val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
114 val_rcr &= 0x00070000;
115 if (val_rcr)
116 *((bool *) (val)) = false;
117 else
118 *((bool *) (val)) = true;

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253 "Set HW_VAR_SHORTGI_DENSITY: %#x\n",
254 mac->min_space_cfg);
255 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
256 mac->min_space_cfg);
257 break;
258 }
259 case HW_VAR_AMPDU_FACTOR: {
260 u8 factor_toset;
111 *((bool *) (val)) = true;
112 } else {
113 val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
114 val_rcr &= 0x00070000;
115 if (val_rcr)
116 *((bool *) (val)) = false;
117 else
118 *((bool *) (val)) = true;

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253 "Set HW_VAR_SHORTGI_DENSITY: %#x\n",
254 mac->min_space_cfg);
255 rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
256 mac->min_space_cfg);
257 break;
258 }
259 case HW_VAR_AMPDU_FACTOR: {
260 u8 factor_toset;
261 u32 regtoSet;
261 u32 regtoset;
262 u8 *ptmp_byte = NULL;
263 u8 index;
264
265 if (rtlhal->macphymode == DUALMAC_DUALPHY)
262 u8 *ptmp_byte = NULL;
263 u8 index;
264
265 if (rtlhal->macphymode == DUALMAC_DUALPHY)
266 regtoSet = 0xb9726641;
266 regtoset = 0xb9726641;
267 else if (rtlhal->macphymode == DUALMAC_SINGLEPHY)
267 else if (rtlhal->macphymode == DUALMAC_SINGLEPHY)
268 regtoSet = 0x66626641;
268 regtoset = 0x66626641;
269 else
269 else
270 regtoSet = 0xb972a841;
270 regtoset = 0xb972a841;
271 factor_toset = *val;
272 if (factor_toset <= 3) {
273 factor_toset = (1 << (factor_toset + 2));
274 if (factor_toset > 0xf)
275 factor_toset = 0xf;
276 for (index = 0; index < 4; index++) {
271 factor_toset = *val;
272 if (factor_toset <= 3) {
273 factor_toset = (1 << (factor_toset + 2));
274 if (factor_toset > 0xf)
275 factor_toset = 0xf;
276 for (index = 0; index < 4; index++) {
277 ptmp_byte = (u8 *) (&regtoSet) + index;
277 ptmp_byte = (u8 *)(&regtoset) + index;
278 if ((*ptmp_byte & 0xf0) >
279 (factor_toset << 4))
280 *ptmp_byte = (*ptmp_byte & 0x0f)
281 | (factor_toset << 4);
282 if ((*ptmp_byte & 0x0f) > factor_toset)
283 *ptmp_byte = (*ptmp_byte & 0xf0)
284 | (factor_toset);
285 }
278 if ((*ptmp_byte & 0xf0) >
279 (factor_toset << 4))
280 *ptmp_byte = (*ptmp_byte & 0x0f)
281 | (factor_toset << 4);
282 if ((*ptmp_byte & 0x0f) > factor_toset)
283 *ptmp_byte = (*ptmp_byte & 0xf0)
284 | (factor_toset);
285 }
286 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, regtoSet);
286 rtl_write_dword(rtlpriv, REG_AGGLEN_LMT, regtoset);
287 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
288 "Set HW_VAR_AMPDU_FACTOR: %#x\n",
289 factor_toset);
290 }
291 break;
292 }
293 case HW_VAR_AC_PARAM: {
294 u8 e_aci = *val;

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504 return status;
505}
506
507static bool _rtl92de_llt_table_init(struct ieee80211_hw *hw)
508{
509 struct rtl_priv *rtlpriv = rtl_priv(hw);
510 unsigned short i;
511 u8 txpktbuf_bndy;
287 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
288 "Set HW_VAR_AMPDU_FACTOR: %#x\n",
289 factor_toset);
290 }
291 break;
292 }
293 case HW_VAR_AC_PARAM: {
294 u8 e_aci = *val;

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504 return status;
505}
506
507static bool _rtl92de_llt_table_init(struct ieee80211_hw *hw)
508{
509 struct rtl_priv *rtlpriv = rtl_priv(hw);
510 unsigned short i;
511 u8 txpktbuf_bndy;
512 u8 maxPage;
512 u8 maxpage;
513 bool status;
514 u32 value32; /* High+low page number */
515 u8 value8; /* normal page number */
516
517 if (rtlpriv->rtlhal.macphymode == SINGLEMAC_SINGLEPHY) {
513 bool status;
514 u32 value32; /* High+low page number */
515 u8 value8; /* normal page number */
516
517 if (rtlpriv->rtlhal.macphymode == SINGLEMAC_SINGLEPHY) {
518 maxPage = 255;
518 maxpage = 255;
519 txpktbuf_bndy = 246;
520 value8 = 0;
521 value32 = 0x80bf0d29;
522 } else {
519 txpktbuf_bndy = 246;
520 value8 = 0;
521 value32 = 0x80bf0d29;
522 } else {
523 maxPage = 127;
523 maxpage = 127;
524 txpktbuf_bndy = 123;
525 value8 = 0;
526 value32 = 0x80750005;
527 }
528
529 /* Set reserved page for each queue */
530 /* 11. RQPN 0x200[31:0] = 0x80BD1C1C */
531 /* load RQPN */

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571 status = _rtl92de_llt_write(hw, (txpktbuf_bndy - 1), 0xFF);
572 if (true != status)
573 return status;
574
575 /* Make the other pages as ring buffer */
576 /* This ring buffer is used as beacon buffer if we */
577 /* config this MAC as two MAC transfer. */
578 /* Otherwise used as local loopback buffer. */
524 txpktbuf_bndy = 123;
525 value8 = 0;
526 value32 = 0x80750005;
527 }
528
529 /* Set reserved page for each queue */
530 /* 11. RQPN 0x200[31:0] = 0x80BD1C1C */
531 /* load RQPN */

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571 status = _rtl92de_llt_write(hw, (txpktbuf_bndy - 1), 0xFF);
572 if (true != status)
573 return status;
574
575 /* Make the other pages as ring buffer */
576 /* This ring buffer is used as beacon buffer if we */
577 /* config this MAC as two MAC transfer. */
578 /* Otherwise used as local loopback buffer. */
579 for (i = txpktbuf_bndy; i < maxPage; i++) {
579 for (i = txpktbuf_bndy; i < maxpage; i++) {
580 status = _rtl92de_llt_write(hw, i, (i + 1));
581 if (true != status)
582 return status;
583 }
584
585 /* Let last entry point to the start entry of ring buffer */
580 status = _rtl92de_llt_write(hw, i, (i + 1));
581 if (true != status)
582 return status;
583 }
584
585 /* Let last entry point to the start entry of ring buffer */
586 status = _rtl92de_llt_write(hw, maxPage, txpktbuf_bndy);
586 status = _rtl92de_llt_write(hw, maxpage, txpktbuf_bndy);
587 if (true != status)
588 return status;
589
590 return true;
591}
592
593static void _rtl92de_gen_refresh_led_state(struct ieee80211_hw *hw)
594{

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1388 rtlpci->irq_mask[0] |= add_msr;
1389 if (rm_msr)
1390 rtlpci->irq_mask[0] &= (~rm_msr);
1391 rtl92de_disable_interrupt(hw);
1392 rtl92de_enable_interrupt(hw);
1393}
1394
1395static void _rtl92de_readpowervalue_fromprom(struct txpower_info *pwrinfo,
587 if (true != status)
588 return status;
589
590 return true;
591}
592
593static void _rtl92de_gen_refresh_led_state(struct ieee80211_hw *hw)
594{

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1388 rtlpci->irq_mask[0] |= add_msr;
1389 if (rm_msr)
1390 rtlpci->irq_mask[0] &= (~rm_msr);
1391 rtl92de_disable_interrupt(hw);
1392 rtl92de_enable_interrupt(hw);
1393}
1394
1395static void _rtl92de_readpowervalue_fromprom(struct txpower_info *pwrinfo,
1396 u8 *rom_content, bool autoLoadfail)
1396 u8 *rom_content, bool autoloadfail)
1397{
1398 u32 rfpath, eeaddr, group, offset1, offset2;
1399 u8 i;
1400
1401 memset(pwrinfo, 0, sizeof(struct txpower_info));
1397{
1398 u32 rfpath, eeaddr, group, offset1, offset2;
1399 u8 i;
1400
1401 memset(pwrinfo, 0, sizeof(struct txpower_info));
1402 if (autoLoadfail) {
1402 if (autoloadfail) {
1403 for (group = 0; group < CHANNEL_GROUP_MAX; group++) {
1404 for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) {
1405 if (group < CHANNEL_GROUP_MAX_2G) {
1406 pwrinfo->cck_index[rfpath][group] =
1407 EEPROM_DEFAULT_TXPOWERLEVEL_2G;
1408 pwrinfo->ht40_1sindex[rfpath][group] =
1409 EEPROM_DEFAULT_TXPOWERLEVEL_2G;
1410 } else {

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1536
1537static void _rtl92de_read_txpower_info(struct ieee80211_hw *hw,
1538 bool autoload_fail, u8 *hwinfo)
1539{
1540 struct rtl_priv *rtlpriv = rtl_priv(hw);
1541 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1542 struct txpower_info pwrinfo;
1543 u8 tempval[2], i, pwr, diff;
1403 for (group = 0; group < CHANNEL_GROUP_MAX; group++) {
1404 for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) {
1405 if (group < CHANNEL_GROUP_MAX_2G) {
1406 pwrinfo->cck_index[rfpath][group] =
1407 EEPROM_DEFAULT_TXPOWERLEVEL_2G;
1408 pwrinfo->ht40_1sindex[rfpath][group] =
1409 EEPROM_DEFAULT_TXPOWERLEVEL_2G;
1410 } else {

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1536
1537static void _rtl92de_read_txpower_info(struct ieee80211_hw *hw,
1538 bool autoload_fail, u8 *hwinfo)
1539{
1540 struct rtl_priv *rtlpriv = rtl_priv(hw);
1541 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1542 struct txpower_info pwrinfo;
1543 u8 tempval[2], i, pwr, diff;
1544 u32 ch, rfPath, group;
1544 u32 ch, rfpath, group;
1545
1546 _rtl92de_readpowervalue_fromprom(&pwrinfo, hwinfo, autoload_fail);
1547 if (!autoload_fail) {
1548 /* bit0~2 */
1549 rtlefuse->eeprom_regulatory = (hwinfo[EEPROM_RF_OPT1] & 0x7);
1550 rtlefuse->eeprom_thermalmeter =
1551 hwinfo[EEPROM_THERMAL_METER] & 0x1f;
1552 rtlefuse->crystalcap = hwinfo[EEPROM_XTAL_K];

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1616 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1617 "ThermalMeter = 0x%x\n", rtlefuse->eeprom_thermalmeter);
1618 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1619 "CrystalCap = 0x%x\n", rtlefuse->crystalcap);
1620 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1621 "Delta_IQK = 0x%x Delta_LCK = 0x%x\n",
1622 rtlefuse->delta_iqk, rtlefuse->delta_lck);
1623
1545
1546 _rtl92de_readpowervalue_fromprom(&pwrinfo, hwinfo, autoload_fail);
1547 if (!autoload_fail) {
1548 /* bit0~2 */
1549 rtlefuse->eeprom_regulatory = (hwinfo[EEPROM_RF_OPT1] & 0x7);
1550 rtlefuse->eeprom_thermalmeter =
1551 hwinfo[EEPROM_THERMAL_METER] & 0x1f;
1552 rtlefuse->crystalcap = hwinfo[EEPROM_XTAL_K];

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1616 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1617 "ThermalMeter = 0x%x\n", rtlefuse->eeprom_thermalmeter);
1618 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1619 "CrystalCap = 0x%x\n", rtlefuse->crystalcap);
1620 RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD,
1621 "Delta_IQK = 0x%x Delta_LCK = 0x%x\n",
1622 rtlefuse->delta_iqk, rtlefuse->delta_lck);
1623
1624 for (rfPath = 0; rfPath < RF6052_MAX_PATH; rfPath++) {
1624 for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) {
1625 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
1626 group = rtl92d_get_chnlgroup_fromarray((u8) ch);
1627 if (ch < CHANNEL_MAX_NUMBER_2G)
1625 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
1626 group = rtl92d_get_chnlgroup_fromarray((u8) ch);
1627 if (ch < CHANNEL_MAX_NUMBER_2G)
1628 rtlefuse->txpwrlevel_cck[rfPath][ch] =
1629 pwrinfo.cck_index[rfPath][group];
1630 rtlefuse->txpwrlevel_ht40_1s[rfPath][ch] =
1631 pwrinfo.ht40_1sindex[rfPath][group];
1632 rtlefuse->txpwr_ht20diff[rfPath][ch] =
1633 pwrinfo.ht20indexdiff[rfPath][group];
1634 rtlefuse->txpwr_legacyhtdiff[rfPath][ch] =
1635 pwrinfo.ofdmindexdiff[rfPath][group];
1636 rtlefuse->pwrgroup_ht20[rfPath][ch] =
1637 pwrinfo.ht20maxoffset[rfPath][group];
1638 rtlefuse->pwrgroup_ht40[rfPath][ch] =
1639 pwrinfo.ht40maxoffset[rfPath][group];
1640 pwr = pwrinfo.ht40_1sindex[rfPath][group];
1641 diff = pwrinfo.ht40_2sindexdiff[rfPath][group];
1642 rtlefuse->txpwrlevel_ht40_2s[rfPath][ch] =
1628 rtlefuse->txpwrlevel_cck[rfpath][ch] =
1629 pwrinfo.cck_index[rfpath][group];
1630 rtlefuse->txpwrlevel_ht40_1s[rfpath][ch] =
1631 pwrinfo.ht40_1sindex[rfpath][group];
1632 rtlefuse->txpwr_ht20diff[rfpath][ch] =
1633 pwrinfo.ht20indexdiff[rfpath][group];
1634 rtlefuse->txpwr_legacyhtdiff[rfpath][ch] =
1635 pwrinfo.ofdmindexdiff[rfpath][group];
1636 rtlefuse->pwrgroup_ht20[rfpath][ch] =
1637 pwrinfo.ht20maxoffset[rfpath][group];
1638 rtlefuse->pwrgroup_ht40[rfpath][ch] =
1639 pwrinfo.ht40maxoffset[rfpath][group];
1640 pwr = pwrinfo.ht40_1sindex[rfpath][group];
1641 diff = pwrinfo.ht40_2sindexdiff[rfpath][group];
1642 rtlefuse->txpwrlevel_ht40_2s[rfpath][ch] =
1643 (pwr > diff) ? (pwr - diff) : 0;
1644 }
1645 }
1646}
1647
1648static void _rtl92de_read_macphymode_from_prom(struct ieee80211_hw *hw,
1649 u8 *content)
1650{

--- 580 unchanged lines hidden --- 		1643 (pwr > diff) ? (pwr - diff) : 0;
1644 }
1645 }
1646}
1647
1648static void _rtl92de_read_macphymode_from_prom(struct ieee80211_hw *hw,
1649 u8 *content)
1650{

--- 580 unchanged lines hidden ---