mac.c (1ef3aa88935b994e2e58a15d15ebe697e39a0b48) mac.c (427f9ebec682f8fd44202f5582d745ead09d95ce)
1/*
2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
3 * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *

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49 mt76_set(dev, MT_BBP(CORE, 4), BIT(0));
50 mt76_clear(dev, MT_BBP(CORE, 4), BIT(0));
51 }
52
53 mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg);
54}
55EXPORT_SYMBOL_GPL(mt76x2_mac_stop);
56
1/*
2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
3 * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *

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49 mt76_set(dev, MT_BBP(CORE, 4), BIT(0));
50 mt76_clear(dev, MT_BBP(CORE, 4), BIT(0));
51 }
52
53 mt76_wr(dev, MT_TX_RTS_CFG, rts_cfg);
54}
55EXPORT_SYMBOL_GPL(mt76x2_mac_stop);
56
57void mt76x2_mac_write_txwi(struct mt76x2_dev *dev, struct mt76x02_txwi *txwi,
58 struct sk_buff *skb, struct mt76_wcid *wcid,
59 struct ieee80211_sta *sta, int len)
60{
61 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
62 struct ieee80211_tx_rate *rate = &info->control.rates[0];
63 struct ieee80211_key_conf *key = info->control.hw_key;
64 u16 rate_ht_mask = FIELD_PREP(MT_RXWI_RATE_PHY, BIT(1) | BIT(2));
65 u8 nss;
66 s8 txpwr_adj, max_txpwr_adj;
67 u8 ccmp_pn[8];
68
69 memset(txwi, 0, sizeof(*txwi));
70
71 if (wcid)
72 txwi->wcid = wcid->idx;
73 else
74 txwi->wcid = 0xff;
75
76 txwi->pktid = 1;
77
78 if (wcid && wcid->sw_iv && key) {
79 u64 pn = atomic64_inc_return(&key->tx_pn);
80 ccmp_pn[0] = pn;
81 ccmp_pn[1] = pn >> 8;
82 ccmp_pn[2] = 0;
83 ccmp_pn[3] = 0x20 | (key->keyidx << 6);
84 ccmp_pn[4] = pn >> 16;
85 ccmp_pn[5] = pn >> 24;
86 ccmp_pn[6] = pn >> 32;
87 ccmp_pn[7] = pn >> 40;
88 txwi->iv = *((__le32 *)&ccmp_pn[0]);
89 txwi->eiv = *((__le32 *)&ccmp_pn[1]);
90 }
91
92 spin_lock_bh(&dev->mt76.lock);
93 if (wcid && (rate->idx < 0 || !rate->count)) {
94 txwi->rate = wcid->tx_rate;
95 max_txpwr_adj = wcid->max_txpwr_adj;
96 nss = wcid->tx_rate_nss;
97 } else {
98 txwi->rate = mt76x02_mac_tx_rate_val(&dev->mt76, rate, &nss);
99 max_txpwr_adj = mt76x02_tx_get_max_txpwr_adj(&dev->mt76, rate);
100 }
101 spin_unlock_bh(&dev->mt76.lock);
102
103 txpwr_adj = mt76x2_tx_get_txpwr_adj(&dev->mt76, dev->mt76.txpower_conf,
104 max_txpwr_adj);
105 txwi->ctl2 = FIELD_PREP(MT_TX_PWR_ADJ, txpwr_adj);
106
107 if (mt76xx_rev(dev) >= MT76XX_REV_E4)
108 txwi->txstream = 0x13;
109 else if (mt76xx_rev(dev) >= MT76XX_REV_E3 &&
110 !(txwi->rate & cpu_to_le16(rate_ht_mask)))
111 txwi->txstream = 0x93;
112
113 mt76x02_mac_fill_txwi(txwi, skb, sta, len, nss);
114}
115EXPORT_SYMBOL_GPL(mt76x2_mac_write_txwi);
116
117int mt76x2_mac_get_rssi(struct mt76x2_dev *dev, s8 rssi, int chain)
118{
119 struct mt76x2_rx_freq_cal *cal = &dev->cal.rx;
120
121 rssi += cal->rssi_offset[chain];
122 rssi -= cal->lna_gain;
123
124 return rssi;

--- 115 unchanged lines hidden --- 		57int mt76x2_mac_get_rssi(struct mt76x2_dev *dev, s8 rssi, int chain)
58{
59 struct mt76x2_rx_freq_cal *cal = &dev->cal.rx;
60
61 rssi += cal->rssi_offset[chain];
62 rssi -= cal->lna_gain;
63
64 return rssi;

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