mac.c (4fcf6e770b4487db3dbcf48993a36f16f8836680) | mac.c (e90354e0452d33f3dc77d7f5c0ff7033f97e1fbf) |
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1// SPDX-License-Identifier: ISC 2/* Copyright (C) 2019 MediaTek Inc. 3 * 4 * Author: Ryder Lee <ryder.lee@mediatek.com> 5 * Roy Luo <royluo@google.com> 6 * Felix Fietkau <nbd@nbd.name> 7 * Lorenzo Bianconi <lorenzo@kernel.org> 8 */ --- 167 unchanged lines hidden (view full) --- 176 status->band = mphy->chandef.chan->band; 177 return; 178 } 179 180 status->band = chfreq <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; 181 status->freq = ieee80211_channel_to_frequency(chfreq, status->band); 182} 183 | 1// SPDX-License-Identifier: ISC 2/* Copyright (C) 2019 MediaTek Inc. 3 * 4 * Author: Ryder Lee <ryder.lee@mediatek.com> 5 * Roy Luo <royluo@google.com> 6 * Felix Fietkau <nbd@nbd.name> 7 * Lorenzo Bianconi <lorenzo@kernel.org> 8 */ --- 167 unchanged lines hidden (view full) --- 176 status->band = mphy->chandef.chan->band; 177 return; 178 } 179 180 status->band = chfreq <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; 181 status->freq = ieee80211_channel_to_frequency(chfreq, status->band); 182} 183 |
184int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb) | 184static int mt7615_mac_fill_rx(struct mt7615_dev *dev, struct sk_buff *skb) |
185{ 186 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 187 struct mt76_phy *mphy = &dev->mt76.phy; 188 struct mt7615_phy *phy = &dev->phy; 189 struct mt7615_phy *phy2 = dev->mt76.phy2 ? dev->mt76.phy2->priv : NULL; 190 struct ieee80211_supported_band *sband; 191 struct ieee80211_hdr *hdr; 192 __le32 *rxd = (__le32 *)skb->data; --- 226 unchanged lines hidden (view full) --- 419 status->seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl)); 420 421 return 0; 422} 423 424void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps) 425{ 426} | 185{ 186 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 187 struct mt76_phy *mphy = &dev->mt76.phy; 188 struct mt7615_phy *phy = &dev->phy; 189 struct mt7615_phy *phy2 = dev->mt76.phy2 ? dev->mt76.phy2->priv : NULL; 190 struct ieee80211_supported_band *sband; 191 struct ieee80211_hdr *hdr; 192 __le32 *rxd = (__le32 *)skb->data; --- 226 unchanged lines hidden (view full) --- 419 status->seqno = IEEE80211_SEQ_TO_SN(le16_to_cpu(hdr->seq_ctrl)); 420 421 return 0; 422} 423 424void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps) 425{ 426} |
427EXPORT_SYMBOL_GPL(mt7615_sta_ps); |
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427 | 428 |
428void mt7615_tx_complete_skb(struct mt76_dev *mdev, enum mt76_txq_id qid, 429 struct mt76_queue_entry *e) 430{ 431 if (!e->txwi) { 432 dev_kfree_skb_any(e->skb); 433 return; 434 } 435 436 /* error path */ 437 if (e->skb == DMA_DUMMY_DATA) { 438 struct mt76_txwi_cache *t; 439 struct mt7615_dev *dev; 440 struct mt7615_txp_common *txp; 441 u16 token; 442 443 dev = container_of(mdev, struct mt7615_dev, mt76); 444 txp = mt7615_txwi_to_txp(mdev, e->txwi); 445 446 if (is_mt7615(&dev->mt76)) 447 token = le16_to_cpu(txp->fw.token); 448 else 449 token = le16_to_cpu(txp->hw.msdu_id[0]) & 450 ~MT_MSDU_ID_VALID; 451 452 spin_lock_bh(&dev->token_lock); 453 t = idr_remove(&dev->token, token); 454 spin_unlock_bh(&dev->token_lock); 455 e->skb = t ? t->skb : NULL; 456 } 457 458 if (e->skb) 459 mt76_tx_complete_skb(mdev, e->skb); 460} 461 | |
462static u16 463mt7615_mac_tx_rate_val(struct mt7615_dev *dev, 464 struct mt76_phy *mphy, 465 const struct ieee80211_tx_rate *rate, 466 bool stbc, u8 *bw) 467{ 468 u8 phy, nss, rate_idx; 469 u16 rateval = 0; --- 197 unchanged lines hidden (view full) --- 667 txwi[7] = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 668 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 669 if (is_usb) 670 txwi[8] = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) | 671 FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype); 672 673 return 0; 674} | 429static u16 430mt7615_mac_tx_rate_val(struct mt7615_dev *dev, 431 struct mt76_phy *mphy, 432 const struct ieee80211_tx_rate *rate, 433 bool stbc, u8 *bw) 434{ 435 u8 phy, nss, rate_idx; 436 u16 rateval = 0; --- 197 unchanged lines hidden (view full) --- 634 txwi[7] = FIELD_PREP(MT_TXD7_TYPE, fc_type) | 635 FIELD_PREP(MT_TXD7_SUB_TYPE, fc_stype); 636 if (is_usb) 637 txwi[8] = FIELD_PREP(MT_TXD8_L_TYPE, fc_type) | 638 FIELD_PREP(MT_TXD8_L_SUB_TYPE, fc_stype); 639 640 return 0; 641} |
642EXPORT_SYMBOL_GPL(mt7615_mac_write_txwi); |
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675 676static void 677mt7615_txp_skb_unmap_fw(struct mt76_dev *dev, struct mt7615_fw_txp *txp) 678{ 679 int i; 680 681 for (i = 1; i < txp->nbuf; i++) 682 dma_unmap_single(dev->dev, le32_to_cpu(txp->buf[i]), --- 37 unchanged lines hidden (view full) --- 720 struct mt7615_txp_common *txp; 721 722 txp = mt7615_txwi_to_txp(dev, t); 723 if (is_mt7615(dev)) 724 mt7615_txp_skb_unmap_fw(dev, &txp->fw); 725 else 726 mt7615_txp_skb_unmap_hw(dev, &txp->hw); 727} | 643 644static void 645mt7615_txp_skb_unmap_fw(struct mt76_dev *dev, struct mt7615_fw_txp *txp) 646{ 647 int i; 648 649 for (i = 1; i < txp->nbuf; i++) 650 dma_unmap_single(dev->dev, le32_to_cpu(txp->buf[i]), --- 37 unchanged lines hidden (view full) --- 688 struct mt7615_txp_common *txp; 689 690 txp = mt7615_txwi_to_txp(dev, t); 691 if (is_mt7615(dev)) 692 mt7615_txp_skb_unmap_fw(dev, &txp->fw); 693 else 694 mt7615_txp_skb_unmap_hw(dev, &txp->hw); 695} |
696EXPORT_SYMBOL_GPL(mt7615_txp_skb_unmap); |
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728 729bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask) 730{ 731 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX, 732 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask); 733 734 return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 735 0, 5000); --- 69 unchanged lines hidden (view full) --- 805 806 ieee80211_sta_register_airtime(sta, tid, tx_cur, 807 rx_cur); 808 } 809 } 810 811 rcu_read_unlock(); 812} | 697 698bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask) 699{ 700 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX, 701 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask); 702 703 return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 704 0, 5000); --- 69 unchanged lines hidden (view full) --- 774 775 ieee80211_sta_register_airtime(sta, tid, tx_cur, 776 rx_cur); 777 } 778 } 779 780 rcu_read_unlock(); 781} |
782EXPORT_SYMBOL_GPL(mt7615_mac_sta_poll); |
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813 814static void 815mt7615_mac_update_rate_desc(struct mt7615_phy *phy, struct mt7615_sta *sta, 816 struct ieee80211_tx_rate *probe_rate, 817 struct ieee80211_tx_rate *rates, 818 struct mt7615_rate_desc *rd) 819{ 820 struct mt7615_dev *dev = phy->dev; --- 139 unchanged lines hidden (view full) --- 960 sta->rate_set_tsf |= rd.rateset; 961 962 if (!(sta->wcid.tx_info & MT_WCID_TX_INFO_SET)) 963 mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000); 964 965 sta->rate_count = 2 * MT7615_RATE_RETRY * n_rates; 966 sta->wcid.tx_info |= MT_WCID_TX_INFO_SET; 967} | 783 784static void 785mt7615_mac_update_rate_desc(struct mt7615_phy *phy, struct mt7615_sta *sta, 786 struct ieee80211_tx_rate *probe_rate, 787 struct ieee80211_tx_rate *rates, 788 struct mt7615_rate_desc *rd) 789{ 790 struct mt7615_dev *dev = phy->dev; --- 139 unchanged lines hidden (view full) --- 930 sta->rate_set_tsf |= rd.rateset; 931 932 if (!(sta->wcid.tx_info & MT_WCID_TX_INFO_SET)) 933 mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 0, 5000); 934 935 sta->rate_count = 2 * MT7615_RATE_RETRY * n_rates; 936 sta->wcid.tx_info |= MT_WCID_TX_INFO_SET; 937} |
938EXPORT_SYMBOL_GPL(mt7615_mac_set_rates); |
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968 969int mt7615_mac_wtbl_update_key(struct mt7615_dev *dev, 970 struct mt76_wcid *wcid, 971 u8 *key, u8 keylen, 972 enum mt7615_cipher_type cipher, 973 enum set_key_cmd cmd) 974{ 975 u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx) + 30 * 4; --- 121 unchanged lines hidden (view full) --- 1097 wcid->cipher &= ~BIT(cipher); 1098 1099out: 1100 spin_unlock_bh(&dev->mt76.lock); 1101 1102 return err; 1103} 1104 | 939 940int mt7615_mac_wtbl_update_key(struct mt7615_dev *dev, 941 struct mt76_wcid *wcid, 942 u8 *key, u8 keylen, 943 enum mt7615_cipher_type cipher, 944 enum set_key_cmd cmd) 945{ 946 u32 addr = mt7615_mac_wtbl_addr(dev, wcid->idx) + 30 * 4; --- 121 unchanged lines hidden (view full) --- 1068 wcid->cipher &= ~BIT(cipher); 1069 1070out: 1071 spin_unlock_bh(&dev->mt76.lock); 1072 1073 return err; 1074} 1075 |
1105static void 1106mt7615_write_hw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info, 1107 void *txp_ptr, u32 id) 1108{ 1109 struct mt7615_hw_txp *txp = txp_ptr; 1110 struct mt7615_txp_ptr *ptr = &txp->ptr[0]; 1111 int i, nbuf = tx_info->nbuf - 1; 1112 u32 last_mask; 1113 1114 tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp); 1115 tx_info->nbuf = 1; 1116 1117 txp->msdu_id[0] = cpu_to_le16(id | MT_MSDU_ID_VALID); 1118 1119 if (is_mt7663(&dev->mt76)) 1120 last_mask = MT_TXD_LEN_LAST; 1121 else 1122 last_mask = MT_TXD_LEN_AMSDU_LAST | 1123 MT_TXD_LEN_MSDU_LAST; 1124 1125 for (i = 0; i < nbuf; i++) { 1126 u16 len = tx_info->buf[i + 1].len & MT_TXD_LEN_MASK; 1127 u32 addr = tx_info->buf[i + 1].addr; 1128 1129 if (i == nbuf - 1) 1130 len |= last_mask; 1131 1132 if (i & 1) { 1133 ptr->buf1 = cpu_to_le32(addr); 1134 ptr->len1 = cpu_to_le16(len); 1135 ptr++; 1136 } else { 1137 ptr->buf0 = cpu_to_le32(addr); 1138 ptr->len0 = cpu_to_le16(len); 1139 } 1140 } 1141} 1142 1143static void 1144mt7615_write_fw_txp(struct mt7615_dev *dev, struct mt76_tx_info *tx_info, 1145 void *txp_ptr, u32 id) 1146{ 1147 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data; 1148 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); 1149 struct ieee80211_key_conf *key = info->control.hw_key; 1150 struct ieee80211_vif *vif = info->control.vif; 1151 struct mt7615_fw_txp *txp = txp_ptr; 1152 int nbuf = tx_info->nbuf - 1; 1153 int i; 1154 1155 for (i = 0; i < nbuf; i++) { 1156 txp->buf[i] = cpu_to_le32(tx_info->buf[i + 1].addr); 1157 txp->len[i] = cpu_to_le16(tx_info->buf[i + 1].len); 1158 } 1159 txp->nbuf = nbuf; 1160 1161 /* pass partial skb header to fw */ 1162 tx_info->buf[0].len = MT_TXD_SIZE + sizeof(*txp); 1163 tx_info->buf[1].len = MT_CT_PARSE_LEN; 1164 tx_info->nbuf = MT_CT_DMA_BUF_NUM; 1165 1166 txp->flags = cpu_to_le16(MT_CT_INFO_APPLY_TXD); 1167 1168 if (!key) 1169 txp->flags |= cpu_to_le16(MT_CT_INFO_NONE_CIPHER_FRAME); 1170 1171 if (ieee80211_is_mgmt(hdr->frame_control)) 1172 txp->flags |= cpu_to_le16(MT_CT_INFO_MGMT_FRAME); 1173 1174 if (vif) { 1175 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv; 1176 1177 txp->bss_idx = mvif->idx; 1178 } 1179 1180 txp->token = cpu_to_le16(id); 1181 txp->rept_wds_wcid = 0xff; 1182} 1183 1184int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 1185 enum mt76_txq_id qid, struct mt76_wcid *wcid, 1186 struct ieee80211_sta *sta, 1187 struct mt76_tx_info *tx_info) 1188{ 1189 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 1190 struct mt7615_sta *msta = container_of(wcid, struct mt7615_sta, wcid); 1191 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); 1192 struct ieee80211_key_conf *key = info->control.hw_key; 1193 int pid, id; 1194 u8 *txwi = (u8 *)txwi_ptr; 1195 struct mt76_txwi_cache *t; 1196 void *txp; 1197 1198 if (!wcid) 1199 wcid = &dev->mt76.global_wcid; 1200 1201 pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb); 1202 1203 if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) { 1204 struct mt7615_phy *phy = &dev->phy; 1205 1206 if ((info->hw_queue & MT_TX_HW_QUEUE_EXT_PHY) && mdev->phy2) 1207 phy = mdev->phy2->priv; 1208 1209 spin_lock_bh(&dev->mt76.lock); 1210 mt7615_mac_set_rates(phy, msta, &info->control.rates[0], 1211 msta->rates); 1212 msta->rate_probe = true; 1213 spin_unlock_bh(&dev->mt76.lock); 1214 } 1215 1216 t = (struct mt76_txwi_cache *)(txwi + mdev->drv->txwi_size); 1217 t->skb = tx_info->skb; 1218 1219 spin_lock_bh(&dev->token_lock); 1220 id = idr_alloc(&dev->token, t, 0, MT7615_TOKEN_SIZE, GFP_ATOMIC); 1221 spin_unlock_bh(&dev->token_lock); 1222 if (id < 0) 1223 return id; 1224 1225 mt7615_mac_write_txwi(dev, txwi_ptr, tx_info->skb, wcid, sta, 1226 pid, key, false); 1227 1228 txp = txwi + MT_TXD_SIZE; 1229 memset(txp, 0, sizeof(struct mt7615_txp_common)); 1230 if (is_mt7615(&dev->mt76)) 1231 mt7615_write_fw_txp(dev, tx_info, txp, id); 1232 else 1233 mt7615_write_hw_txp(dev, tx_info, txp, id); 1234 1235 tx_info->skb = DMA_DUMMY_DATA; 1236 1237 return 0; 1238} 1239 | |
1240static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta, 1241 struct ieee80211_tx_info *info, __le32 *txs_data) 1242{ 1243 struct ieee80211_supported_band *sband; 1244 struct mt7615_rate_set *rs; 1245 struct mt76_phy *mphy; 1246 int first_idx = 0, last_idx; 1247 int i, idx, count; --- 161 unchanged lines hidden (view full) --- 1409 1410 mt76_tx_status_skb_done(mdev, skb, &list); 1411 } 1412 mt76_tx_status_unlock(mdev, &list); 1413 1414 return !!skb; 1415} 1416 | 1076static bool mt7615_fill_txs(struct mt7615_dev *dev, struct mt7615_sta *sta, 1077 struct ieee80211_tx_info *info, __le32 *txs_data) 1078{ 1079 struct ieee80211_supported_band *sband; 1080 struct mt7615_rate_set *rs; 1081 struct mt76_phy *mphy; 1082 int first_idx = 0, last_idx; 1083 int i, idx, count; --- 161 unchanged lines hidden (view full) --- 1245 1246 mt76_tx_status_skb_done(mdev, skb, &list); 1247 } 1248 mt76_tx_status_unlock(mdev, &list); 1249 1250 return !!skb; 1251} 1252 |
1417void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data) | 1253static void mt7615_mac_add_txs(struct mt7615_dev *dev, void *data) |
1418{ 1419 struct ieee80211_tx_info info = {}; 1420 struct ieee80211_sta *sta = NULL; 1421 struct mt7615_sta *msta = NULL; 1422 struct mt76_wcid *wcid; 1423 struct mt76_phy *mphy = &dev->mt76.phy; 1424 __le32 *txs_data = data; 1425 u32 txs; --- 60 unchanged lines hidden (view full) --- 1486 if (txwi->skb) { 1487 mt76_tx_complete_skb(mdev, txwi->skb); 1488 txwi->skb = NULL; 1489 } 1490 1491 mt76_put_txwi(mdev, txwi); 1492} 1493 | 1254{ 1255 struct ieee80211_tx_info info = {}; 1256 struct ieee80211_sta *sta = NULL; 1257 struct mt7615_sta *msta = NULL; 1258 struct mt76_wcid *wcid; 1259 struct mt76_phy *mphy = &dev->mt76.phy; 1260 __le32 *txs_data = data; 1261 u32 txs; --- 60 unchanged lines hidden (view full) --- 1322 if (txwi->skb) { 1323 mt76_tx_complete_skb(mdev, txwi->skb); 1324 txwi->skb = NULL; 1325 } 1326 1327 mt76_put_txwi(mdev, txwi); 1328} 1329 |
1494void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb) | 1330static void mt7615_mac_tx_free(struct mt7615_dev *dev, struct sk_buff *skb) |
1495{ 1496 struct mt7615_tx_free *free = (struct mt7615_tx_free *)skb->data; 1497 u8 i, count; 1498 1499 count = FIELD_GET(MT_TX_FREE_MSDU_ID_CNT, le16_to_cpu(free->ctrl)); 1500 if (is_mt7615(&dev->mt76)) { 1501 __le16 *token = &free->token[0]; 1502 --- 4 unchanged lines hidden (view full) --- 1507 1508 for (i = 0; i < count; i++) 1509 mt7615_mac_tx_free_token(dev, le32_to_cpu(token[i])); 1510 } 1511 1512 dev_kfree_skb(skb); 1513} 1514 | 1331{ 1332 struct mt7615_tx_free *free = (struct mt7615_tx_free *)skb->data; 1333 u8 i, count; 1334 1335 count = FIELD_GET(MT_TX_FREE_MSDU_ID_CNT, le16_to_cpu(free->ctrl)); 1336 if (is_mt7615(&dev->mt76)) { 1337 __le16 *token = &free->token[0]; 1338 --- 4 unchanged lines hidden (view full) --- 1343 1344 for (i = 0; i < count; i++) 1345 mt7615_mac_tx_free_token(dev, le32_to_cpu(token[i])); 1346 } 1347 1348 dev_kfree_skb(skb); 1349} 1350 |
1351void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 1352 struct sk_buff *skb) 1353{ 1354 struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76); 1355 __le32 *rxd = (__le32 *)skb->data; 1356 __le32 *end = (__le32 *)&skb->data[skb->len]; 1357 enum rx_pkt_type type; 1358 u16 flag; 1359 1360 type = FIELD_GET(MT_RXD0_PKT_TYPE, le32_to_cpu(rxd[0])); 1361 flag = FIELD_GET(MT_RXD0_PKT_FLAG, le32_to_cpu(rxd[0])); 1362 if (type == PKT_TYPE_RX_EVENT && flag == 0x1) 1363 type = PKT_TYPE_NORMAL_MCU; 1364 1365 switch (type) { 1366 case PKT_TYPE_TXS: 1367 for (rxd++; rxd + 7 <= end; rxd += 7) 1368 mt7615_mac_add_txs(dev, rxd); 1369 dev_kfree_skb(skb); 1370 break; 1371 case PKT_TYPE_TXRX_NOTIFY: 1372 mt7615_mac_tx_free(dev, skb); 1373 break; 1374 case PKT_TYPE_RX_EVENT: 1375 mt7615_mcu_rx_event(dev, skb); 1376 break; 1377 case PKT_TYPE_NORMAL_MCU: 1378 case PKT_TYPE_NORMAL: 1379 if (!mt7615_mac_fill_rx(dev, skb)) { 1380 mt76_rx(&dev->mt76, q, skb); 1381 return; 1382 } 1383 /* fall through */ 1384 default: 1385 dev_kfree_skb(skb); 1386 break; 1387 } 1388} 1389EXPORT_SYMBOL_GPL(mt7615_queue_rx_skb); 1390 |
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1515static void 1516mt7615_mac_set_default_sensitivity(struct mt7615_phy *phy) 1517{ 1518 struct mt7615_dev *dev = phy->dev; 1519 bool ext_phy = phy != &dev->phy; 1520 1521 mt76_rmw(dev, MT_WF_PHY_MIN_PRI_PWR(ext_phy), 1522 MT_WF_PHY_PD_OFDM_MASK(ext_phy), --- 236 unchanged lines hidden (view full) --- 1759 1760 mt7615_phy_update_channel(&mdev->phy, 0); 1761 if (mdev->phy2) 1762 mt7615_phy_update_channel(mdev->phy2, 1); 1763 1764 /* reset obss airtime */ 1765 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_CLR); 1766} | 1391static void 1392mt7615_mac_set_default_sensitivity(struct mt7615_phy *phy) 1393{ 1394 struct mt7615_dev *dev = phy->dev; 1395 bool ext_phy = phy != &dev->phy; 1396 1397 mt76_rmw(dev, MT_WF_PHY_MIN_PRI_PWR(ext_phy), 1398 MT_WF_PHY_PD_OFDM_MASK(ext_phy), --- 236 unchanged lines hidden (view full) --- 1635 1636 mt7615_phy_update_channel(&mdev->phy, 0); 1637 if (mdev->phy2) 1638 mt7615_phy_update_channel(mdev->phy2, 1); 1639 1640 /* reset obss airtime */ 1641 mt76_set(dev, MT_WF_RMAC_MIB_TIME0, MT_WF_RMAC_MIB_RXTIME_CLR); 1642} |
1643EXPORT_SYMBOL_GPL(mt7615_update_channel); |
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1767 1768static void 1769mt7615_mac_update_mib_stats(struct mt7615_phy *phy) 1770{ 1771 struct mt7615_dev *dev = phy->dev; 1772 struct mib_stats *mib = &phy->mib; 1773 bool ext_phy = phy != &dev->phy; 1774 int i, aggr; --- 337 unchanged lines hidden --- | 1644 1645static void 1646mt7615_mac_update_mib_stats(struct mt7615_phy *phy) 1647{ 1648 struct mt7615_dev *dev = phy->dev; 1649 struct mib_stats *mib = &phy->mib; 1650 bool ext_phy = phy != &dev->phy; 1651 int i, aggr; --- 337 unchanged lines hidden --- |